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Counters and Shift Registers

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Counters and Shift Registers. ELEC 311. Digital Logic and ... Quad register = 4 D flip-flops with common clock. CLR_L = async, active-low, clear signal ... – PowerPoint PPT presentation

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Title: Counters and Shift Registers


1
Counters and Shift Registers
  • ELEC 311
  • Digital Logic and Circuits
  • Dr. Ron Hayne
  • Images Courtesy of John Wakerly and Prentice-Hall

2
T Flip-Flop
  • T (toggle) flip-flop
  • Changes state every positive clock edge

3
(Asynchronous) Ripple Counter
  • Q3 Q2 Q1 Q0
  • 0 0 0 0
  • 0 0 0 1
  • 0 0 1 0
  • 0 0 1 1
  • 0 1 0 0
  • 0 1 0 1
  • 0 1 1 0
  • 0 1 1 1
  • 1 0 0 0

. . .
4
Synchronous (Serial) Counter
  • Serial enable logic

5
Synchronous (Parallel) Counter
  • Parallel enable logic

6
74x163 4-bit Binary Counter
  • Synchronous
  • Active-low Load
  • Active-low Clear
  • Two Enables
  • ENP (parallel)
  • ENT
  • Ripple Carry Out
  • RCO (ENT)
  • Cascading

7
74x163 4-bit Binary Counter
8
Changing Counting Modulus
1000, 1001, 0000, 0001,
9
VHDL Counter
10
VHDL Counter
11
(Shift) Registers
  • Flip-flops packaged in sets
  • Quad register gt 4 D flip-flops with common clock
  • CLR_L gt async, active-low, clear signal
  • Types
  • Serial-in, Serial-out
  • Serial-in, Parallel-out
  • Parallel-in, Serial-out
  • Parallel-in, Parallel-out

12
Quad Register
  • Parallel-in, Parallel-out (no shift)

13
Serial-In, Serial-Out
14
Serial-In, Parallel-Out
RIN
15
Parallel-In, Serial-out
QD
16
74x194 Universal Shift Register
17
Universal Shift Register
18
(Simple) Ring Counter
  • n-bit Shift Register
  • n State Counter

19
Ring Counter
20
(Simple) Ring Counter
21
Self-Correcting Ring Counter
22
VHDL Shift Register
23
VHDL Shift Register
24
VHDL Shift Register
25
Summary
  • Counters
  • Asynchronous
  • Synchronous
  • Shift Registers
  • Serial, Parallel, Universal
  • Ring Counters
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