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RLC Interconnect Modeling and Design

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Title: RLC Interconnect Modeling and Design


1
RLC Interconnect Modeling and Design
Students Jinjun Xiong, Jun Chen Advisor Lei
He Electrical Engineering Department Design
Automation Group (http//eda.ee.ucla.edu) Universi
ty of California at Los Angeles, Los Angeles, CA,
90095 Sponsors Analog Devices, Intel, NSF,
Synopsis
Post Routing Optimization
Abstract
Interconnect Synthesis
  • Given
  • A global routing solution.
  • The RLC crosstalk bound at each sink.
  • Find
  • The coupling bound for each net segment.
  • A min-area SINO solution within each tile.
  • Such that
  • RLC crosstalk bound is satisfied at each sink.
  • The routing area is minimized.
  • Simultaneous shield insertion and net ordering
    (SINO)
  • Given a set of net segments and their noise
    bounds at one tile.
  • Find a min-area SINO solution.
  • Such that all net segments are capacitive noise
    free and have inductive noise less than the given
    bounds.

Signal integrity becomes one of primary
design constraints as the clock frequency
increases and minimum feature size continues to
shrink. State-of-the-art noise avoidance
techniques use only a capacitive model. However,
inductive coupling gains growing importance for
GHz VLSI design. We present the following for
RLC interconnect modeling and design (1) RLC
noise modeling at both tile and full-chip levels
and (2) tile-based interconnect synthesis and
chip-level post-routing optimization, both under
RLC noise constraints.
Keff Model
LSK Model
  • Inductive Coupling coefficient
  • Noise is nearly proportional to the length in
    SINO solutions.

WCN Problem Formulation
  • K(i,j) can be approximated by
  • Worst Case Noise Problem (WCN)
  • Given an interconnect structure and multiple
    aggressors, find the maximum noise amplitude on
    the specified victim.
  • WCN under RC depends on aggressor switching time
    only.
  • WCN under RLC depends on both aggressor switching
    time and aggressor switching pattern.
  • For each sink, LSK value is
  • Sum over the path from source to sink
  • Lt length of the tile t where net i is routed
  • Kit the total inductive coupling of Ni under
    Keff model
  • Keff model approximates WCN in SINO structures by
    weighted sum of K(i,j)

Multiple Phase Algorithm
  • Given a global routing solution and the RLC
    crosstalk bound at each sink
  • Phase I Crosstalk budgeting at the full-chip
    level.
  • Phase II SINO within each region.
  • Phase III Local refinement.
  • Eliminate remaining but very limited RLC
    crosstalk violations.
  • Reduce routing congestion and further reduce
    over-design.

WCN Algorithm
  • S(i,j) sensitivity between Ni and Nj
  • Keff model has high fidelity for RLC WCN in SINO
    structures, but is orders of magnitude faster.
  • Pseudo Exhaustive Searching(PES)
  • Simultaneously Switching(SS)
  • All aggressors switching simultaneously
  • Superposition(SP)
  • Sum of individual noise amplitudes of all
    aggressors.
  • Aligned Switching(AS)
  • Example of two aggressors

SINO Algorithm
  • Phase I partitions crosstalk bounds among all
    routing regions such that the weighted sum of
    height and width is minimized, and is a linear
    programming (LP) problem.
  • SINO is NP-hard
  • Simulated annealing leads to high-quality
    solution in short runtime
  • Up to 20 total routing area reduction over
    uniform shield insertion without net ordering

S.t.
  • SSAS
  • Combining SS and AS

Shielding Estimation
  • Shielding estimation facilitates
  • Early physical design decision-making
  • Routing optimization
  • Estimated number of shields is

Experiment Results
Experiment Results
  • Settings six-bit bus structure with two shields

1 2 3 4 5 6 7 8 9
Sens Rate Budget Scheme Phase I Phase I Phase II Phase II Phase III Phase III LSK Bound (1000)
Sens Rate Budget Scheme Shield hmaxwmax Shield hmaxwmax Shield hmaxwmax LSK Bound (1000)
Primary1 (16x16) Primary1 (16x16) Primary1 (16x16) Primary1 (16x16) Primary1 (16x16) Primary1 (16x16) Primary1 (16x16) Primary1 (16x16) Primary1 (16x16)
50 UD 261.0 193.6194.8 258 194194 129 188192 995.5/269.9
LP 688.9 190.7194.8 (-0.75) 378 182191 (-3.87) 170 182185 (-3.42) 997.5/266.5
70 UD 368.5 199.2199.1 395 200199 228 191193 998.4/310.8
LP 879.0 190.6193.3 (-3.62) 692 182196 (-5.26) 406 183187 (-3.65) 999.0/272.5
  • A multi-variable regression method is used to fit
    the number of shields.

I II III IV V ?
a1 -0.10956 -0.10408 -0.09781 -0.10605 -0.10795 0.0045
a2 0.50339 0.47515 0.47025 0.49420 0.51500 0.0188
R2 0.8186 0.8071 0.8419 0.8711 0.8972 0.0372
  • All max/avg LSK values meet the bound (1000) No
    crosstalk violations!
  • As sensitivity rate/obstacle increases, the
    routing area increases, and so does the number of
    shields.
  • Even though LP consumes more shields, the area is
    not necessary larger
  • Compared to best alternative with uniform
    budgeting (UD) in Phase I.
  • RC model severely underestimates WCN
  • SP can underestimate WCN up to 24
  • SP was believed an upper bound of WCN
  • SSAS is a good approximation of PES, the best
    WCN algorithm
  • SSAS has linear complexity
  • PES has exponential complexity
  • Randomly generate 10,000 routing solutions
  • Evenly divide the the SINO solution in 5 groups
  • The small standard deviation (?) values imply the
    convergence of the parameters and the goodness
    of the shield estimation equation.

Reference
  • K.Lepak, et al., Shield insertion and net
    ordering under explicit RLC noise constraint,
    DAC 01.
  • J. Xiong, et al., Post global routing RLC
    crosstalk budgeting, ICCAD 02.
  • L. He and M. Xu, Modeling and Layout
    Optimization for On-chip Inductive Coupling,
    UW-Madison Tech. Report 00.
  • J. Chen and L. He, Determination of worst-case
    crosstalk noise for non-switching victims in GHz
    Interconnects, TAU 02.
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