Title: Input output organisation
1Chapter 10Input/Output Organization
2Chapter Outline
- Asynchronous data transfers
- Programmed I/O
- Interrupts
- Direct Memory Access
- I/O Processors
- Serial Communication
- Serial Communication Standards
3Asynchronous Data Transfers
4Source-initiated Data Transfer
5Destination-initiated Data Transfer
6Source-initiated Data Transfer with Handshaking
7Destination-initiated Data Transfer with
Handshaking
8Programmed I/O
9Example
10Example
11Example
12Example
13Example
14New Instructions
15New Control Signals
- IO differentiates I/O and memory accesses
- IO 1 for I/O access
- IO 0 for memory access
16New States and RTL Code
17CPU Modifications
18CPU Modifications
- Modify register section
- Modify ALU
19CPU Modifications
- Modify register section
- Modify ALU
- Modify control unit (hard-wired)
20CPU Modifications
- Modify register section
- Modify ALU
- Modify control unit (hard-wired)
- Register and ALU sections unchanged
21CPU Modifications
- Modify register section
- Modify ALU
- Modify control unit (hard-wired)
- Register and ALU sections unchanged
- One new micro-operation DR ? Input Port
22Control Unit Changes
23Control Unit Changes - INC and CLR signals
24Control Unit Changes - INC and CLR signals
25Control Unit Changes - Memory Read Signal
26Interrupts
27Interrupts
- IRQ - Interrupt Request
- IACK - Interrupt Acknowledge
28Types of Interrupts
29Types of Interrupts
30Types of Interrupts
- External
- Internal
- Software
31Processing Interrupts
- Do nothing (until the current instruction has
been executed)
32Processing Interrupts
- Do nothing (until the current instruction has
been executed) - Get handler address (vectored)
33Processing Interrupts
- Do nothing (until the current instruction has
been executed) - Get handler address (vectored)
- Invoke handler routine
34Vectored Interrupt Hardware
35Non-vectored Interrupt Hardware
36Multiple Non-vectored Interrupts
37Daisy Chaining
38IACKin and IACKout
39Parallel Priority Interrupts
40CPU Modifications
41CPU Modifications
42Interrupt States
43Direct Memory Access
44DMA Controller
45DMA Transfer Modes
46DMA Transfer Modes
- Block/Burst Mode
- Cycle Stealing Mode
47DMA Transfer Modes
- Block/Burst Mode
- Cycle Stealing Mode
- Transparent Mode
48CPU Modifications - Micro-operations
49CPU Modifications - Micro-operations
50CPU Modifications
51CPU Modifications
52I/O Processors
53I/O Processors - operations
54I/O Processors - operations
- Block transfer commands
- ALU operations
55I/O Processors - operations
- Block transfer commands
- ALU operations
- Control commands
56Asynchronous Serial Communication
- bps - Bits Per Second (baud rate)
57Asynchronous Serial Communication
- bps - Bits Per Second (baud rate)
- start bit
58Asynchronous Serial Communication
- bps - Bits Per Second (baud rate)
- start bit
- parity bit
59Asynchronous Serial Communication
- bps - Bits Per Second (baud rate)
- start bit
- parity bit
- stop bit(s)
60Asynchronous Serial Communication
- bps - Bits Per Second (baud rate)
- start bit
- parity bit
- stop bit(s)
- bit time
61Asynchronous Serial Communication
62Synchronous Serial Communication - HDLC
63Universal Asynchronous Receiver/Transmitters
64UART Internal Configuration
65RS 232C Standard - Signals
- Request To Send
- Clear To Send
- Transmission Data
- Data Terminal Ready
- Data Set Ready
- Received Data
- Data Carrier Detect
- Ring Indicator
- Ground
66RS 232C Standard - Connection
- Use RTS, CTS, DTR, and DSR to verify that both
devices are active
67RS 232C Standard - Connection
- Use RTS, CTS, DTR, and DSR to verify that both
devices are active - Use RI to indicate call status
68RS 232C Standard - Connection
- Use RTS, CTS, DTR, and DSR to verify that both
devices are active - Use RI to indicate call status
- Use DCD to establish connectivity
69RS 232C Standard - Connection
- Use RTS, CTS, DTR, and DSR to verify that both
devices are active - Use RI to indicate call status
- Use DCD to establish connectivity
- Use TD and RD to transfer data, and RTS and CTS
to coordinate transfers
70RS 422 Standard - Signals
71Universal Serial Bus Standard
- Connects one port to several devices
72Universal Serial Bus Standard
- Connects one port to several devices
- Transfers data in packets
- Token packets
- Data packets
- Handshake packets
- Special Packets
73USB Packet Formats
74Summary
- Asynchronous data transfers
- Programmed I/O
- Interrupts
- Direct Memory Access
- I/O Processors
- Serial Communication
- Serial Communication Standards