68000 Microprocessor

1
68000 Microprocessor

• Bryan Duggan

2
Overview of this section

• A real CPU!
• Structure (from a programming perspective)
• Registers
• Word size
• Limitations
• Addressable memory
• Instruction Set
• Types of Instructions
• Instructions In Detail
• Simple Programs

3
68000

• Used in the Original Apple Mac, Amiga and Atari
  ST
• 32 bit wide data registers
• 16 bit bus, so data is moved in in 2 cycles, when
  32 bits are required
• Advantages
• Processor is simpler/cheaper to design
• Less memory wasted
• Disadvantage
• Multiple fetches needed for a single instruction
• Byte addressable memory
• MSB in the even addresses (D8 - D15)
• LSB in the odd addresses (D0 - D7)
• Can address up to 16 Mb of Memory, but yet has 32
  bit registers Why?
• Only 24 bits are used, due to the pin arrangement
  on the CPU

4
Registers

• 8 General purpose data registers
• Can keep frequently used data on the chip
• Automatically done by programs, compilers
• RISC 1 has 100 registers on chip
• Can perform operations on bytes, words and long
  words
• 8 General purpose address registers
• Called pointer registers
• A0 - A6 all the same A7 also used as a stack
  register
• Can move data
• Program counter (32 bits wide)
• Status Register - Status Byte and CCR

5
Diagram of the 68000
6
Why Learn Assembly Language?

• There are still some reasons for learning an
  assembly language
• Knowing an assembly language helps you understand
  whats happening inside a computer. This
  knowledge helps you understand whats really
  happening when you write code in a higher-level
  language. For instance, you realise that passing
  parameters to functions is expensive.
• Sometimes, when working very close to the
  hardware level (like when writing hardware
  drivers or when working in embedded systems), you
  will either need to code or debug in assembly
  language.
• Using assembly language lets you control exactly
  what happens in your program. If you absolutely
  have to squeeze every inch of performance out of
  your program, using assembly language may be the
  best way to go. This reason is less important
  these days with fast processors and good
  compilers (that can write pretty good assembly
  themselves), but every once in a while it comes
  up.

7
Assembly Language Instructions Classifications

• Like many CISC machines, the 68000 allows one
  instruction to operate on several types
• MOVE.B for bytes, MOVE.W for words, and MOVE.L
  for longwords also ADD.B, ADD.W, ADD.L, etc.
• Operand length is coded as bits of the
  instruction word
• 5 Classes of instructions
• Data movement
• Copy an item of data from one place to another
  E.g. from memory to a register
• 70 of instructions are data movement
  instructionsWritten as operation, source,
  destination
• E.g. MOVE Di, Dj Dj ?DiMOVE M, Di Di ?
  MS(m)EXG Di, Dj Dj ?Di, Di ?Dj
  SWAP Di Swaps low and high order bytesLEA M,
  Ai Ai ?M

8
Arithmetic Logical Instructions

• Arithmetic and Logical Instructions
• Act on data as if it was a numerical quantity
• Remember, we are talking about bits of data, not
  numbers
• All act on one of the data or address registers.
  Examples
• ADD Di, Dj
• ADDX
• SUB
• SUBX
• MULU
• DIVU
• AND
• OR
• EOR
• NOT

9
Branch and Control Instructions

• Branch Instructions
• 14 Possible branch Instructions
• CMP
• BEQ
• BRA
• System Control Instructions
• Used by an operating system, set priorities of
  interrupts, or determine the status of status of
  the CPU

10
68000 Instructions Summary

• Instr Description Instr
  Description
• ABCD Add decimal with extend MOVE
  Move source to destination
• ADD Add MULS
  Signed multiply
• AND Logical AND MULU
  Unsigned multiply
• ASL Arithmetic shift left NBCD
  Negate Decimal with Extend
• ASR Arithmetic shift right NEG
  Negate
• Bcc Branch conditionally NOP
  No operation
• BCHG Bit test and change NOT
  Ones complement
• BCLR Bit test and clear OR
  Logical OR
• BRA Branch always PEA
  Push effective address on stack
• BSET Bit test and set RESET
  Reset External devices
• BSR Branch to subroutine ROL
  Rotate left without extend
• BTST Bit test ROR
  Rotate right without extend
• CHK Check register against bounds ROXL
  Rotate left with extend
• CLR Clear operand ROXR
  Rotate right with extend
• CMP Compare RTD
  Return and deallocate
• DBcc Decrement and branch RTE
  Return from exception
• conditionally
  
• DIVS Signed divide RTR
  Return and restore

11
Data Movement Instructions

• A total of 13 instructions in all
• MOVE, MOVEA, MOVE to CCR, MOVE to SR, MOVE from
  SR, MOVE USP, MOVEM, MOVEQ, MOVEP, LEA,
  PEA, EXG, SWAP
• MOVE copies data from one location to another and
  may be qualified by ".B" to move 8 bits ".W" to
  move 16 bits and ".L" to move 32 bits.
• MOVE does not change the source location only the
  destination location.
• MOVE updates the CCR as follows
• N Set (1) if the result (destination) is
  negative, cleared (0) otherwise.
• Z Set if the result is zero, cleared otherwise.
• V Always cleared.
• C Always cleared.
• X Not affected.
• Examples
• MOVE.B D1,D2 Register to register
• MOVE.B D1,1234 Register to memory
• MOVE.B 1234,D1 Memory to register
• MOVE.B 1234,2000 Memory to memory
• MOVE.B 4,D0 Literal to register
• MOVE.B 4,1234 Literal to memory

12
(No Transcript)
13
Data Movement Instructions

• SWAP
• Exchanges the upper and lower order words of a
  data register.
• Source Operand Data register
• Destination Operand N/A
• CCR set according to the resulting register
  value.
• LEA
• Copies an effective address into an address
  register.
• Source Operand
• All except data register, address register
  direct, address register
• indirect with pre-decrement or
  post-increment or immediate.
• Destination Operand Address register
• No effect on CCR.

14
(No Transcript)
15
Load Effective Address, LEA Examples

• Instruction
  Action
• LEA 0010FFFF,A5 Loads the absolute
  address
• LEA (A0),A5 Loads the
  contents of another
• 
  address register
• LEA (12,A0),A5 Loads the
  contents of an address
• 
  register plus a displacement.
• LEA (12,A0,D4.L),A5 Loads the contents of
  an address
• 
  register plus a data register plus
• a
  displacement (used for index
• 
  addressing).

16
Compare Instructions

• All compare instructions subtract the source
  operand, usually the contents of one register
  (or memory location) from the contents of the
  destination operand, usually another register (or
  memory location) in order to set the CCR (except
  the X-bit). The results of the subtraction are
  discarded.
• Compare instructions include the following
• CMP Source operand Any of the addressing
  modes
• Destination Must be a data register.
• CMPA Source operand Any of the addressing
  modes
• Destination Must be an address register.
• CMPI Source operand An immediate value
• Destination Any of the addressing modes
  except address register
• direct or immediate.
• CMPM Compares one memory location with another
• Only addressing mode permitted is address
  register indirect with
• auto- incrementing.

17
Compare Instructions

• CMP ltsourcegt,ltdestinationgt
• The compare instruction, CMP ltsourcegt,ltdestinatio
  ngt, subtracts the source operand from the
  destination operand and updates the bits of the
  condition code register (CCR), according to the
  result. The result of the subtraction is
  discarded.
• CMP or another compare instruction is usually
  followed immediately by a conditional branch
  (e.g., BEQ branch on zero, BNE branch on zero,
  BGT branch if greater than, BLT branch if less
  than, etc). Consider the high-level language
  construct
• MOVE.B X,D0
• CMP.B Y,D0 Evaluate X - Y
• BGE X_Bigger If X is greater
  or equal to Y branch
• MOVE.B Q,P IF X lt Y THEN P Q
• BRA Exit
• X_Bigger MOVE.B R,P IF X gt Y THEN P R
• Exit STOP 2700 Exit point for code-fragment

18
(No Transcript)
19
(No Transcript)
20
(No Transcript)
21
Conditional Branch Instructions

• Identified by the mnemonic Bcc where "cc"
  represents the condition to be checked.
• General form Bcc Address_Label
• If the condition is true, then control will
  branch to "Address_Label".
• No effect on condition codes.
• These instructions can be grouped according the
  type of condition being checked
• Instructions that depend on a single CCR flag
• BNE BEQ BPL BMI BCC BCS
  BVC BVS
• Instructions for signed comparison
• BGE BGT BLE BLT
• Instructions for unsigned comparison
• (BHS or BCC) BHI BLS (BLO or
  BCS)

22
Conditional Branch InstructionsDepending on A
Single CCR Flag

• Mnemonic Instruction
  Branch Taken If
• BNE Branch on not equal Z0
• BEQ Branch on equal Z1
• BPL Branch on not negative N0
• BMI Branch on negative N1
• BCC Branch on carry clear C0
• BCS Branch on carry set C1
• BVC Branch on overflow clear V0
• BVS Branch on overflow set V1

23
Conditional Branch Instructions For Signed
Comparison

• Mnemonic Instruction
  Branch Taken If
• BGE Branch on greater than or equal
  ( N1 AND V1)
• 
  OR (N 0
  AND V0)
• BGT Branch on greater than
  (N1 AND V1 AND Z0)
• 
  OR (N0 AND V0 AND
  Z0)
• BLE Branch on less than or equal
  Z1 OR ( N1 AND V0)
• 
  OR (N0
  AND V 1)
• BLT Branch on less than
  (N1 AND V0)
• 
  OR
  (N0 AND V1)

24
Conditional Branch Instructions For Unsigned
Comparison

• Mnemonic Instruction
  Branch Taken If
• BHS, BCC Branch on higher than or equal
  C0
• BHI Branch on higher than
  C0 AND Z 0
• BLS Branch on less than or
  equal C1 AND Z1
• BLO, BCS Branch on less than
  C1

25
Unconditional Branch Instructions

• Two types of unconditional branch instructions
• BRA Address_Label
• Branches to a statically determined address
  indicated by
• Address_Label
• Examples BRA START
• BRA EXIT
• JMP
• Jump to an address that can be changed during
  execution
• Examples JMP (A0)
• JMP D0

26
(No Transcript)
27
Special Instructions for Address Registers

• If an address register is specified as the
  destination operand, then the following address
  register instructions
• MOVEA, ADDA, SUBA, CMPA
• must be used instead of MOVE, ADD, SUB and
  CMP,
• respectively.
• Address instructions only apply to words and long
  words.
• In the case of a word operation, the source
  operand is sign extended to a long word,
• e.g, 0004 becomes 00000004 and FFF4 becomes
  
• FFFFFFF4.
• Address instructions do not change any of
  condition codes (bits of the CCR).

28
Example Min(X,Y) Using Comparison

• This program demonstrates how to find the smaller
  of two numbers X and Y using the comparison
  operator.
• if (X lt Y) then
• D0 X
• else
• D0 Y
• X and Y are stored in memory and the result of
  the comparison is stored in register D0
• ORG 400 Program origin
• MOVE.B X,D0 Store X in
  D0
• CMP.B Y,D0 Compare Y
  and D0
• BLE Exit
  Branch if X lt Y
• MOVE.B Y,D0 Otherwise, Y is
  smaller
• Exit STOP 2700 Halt processor at end
  of program
• ORG 1000
• X DC.B 4
• Y DC.B 5
• END 400

29
68000 Arithmetic Instructions

• ADD
• Adds the contents of the source location to the
  contents of a
• destination location and stores the result in the
  destination
• location.
• Source All addressing modes however, either
  source or destination must be a data register.
• Destination All except immediate, address
  register direct and program relative.
• Effect on CCR flags
• N Set (1) if the result (destination) is
  negative, cleared
  (0) otherwise.
• Z Set if the result is zero, cleared otherwise.
• V Set if an overflow is generated, cleared
  otherwise.
• C Set if a carry is generated, cleared otherwise.
• X Set the same as the carry bit.

30
(No Transcript)
31
68000 Arithmetic Instructions

• ADDQ
• Adds an immediate literal in the range 1 to 8 to
  an address
• location or a register location.
• Source An immediate value in the range 1 to 8
• Destination All except immediate, and program
  relative.
• Effect on CCR flags
• N Set (1) if the result (destination) is
  negative, cleared
  (0) otherwise.
• Z Set if the result is zero, cleared otherwise.
• V Set if an overflow is generated, cleared
  otherwise.
• C Set if a carry is generated, cleared otherwise.
• X Set the same as the carry bit.
• Condition codes not affected when the destination
  is
• an address register.

32
(No Transcript)
33
68000 Arithmetic Instructions

• ADDX
• Adds the contents of the source location and the
  X flag to the
• contents of a destination location and stores the
  result in the
• destination location.
• Source All addressing modes however, either
  source or destination must be a data register.
• Destination All except immediate, address
  register direct and program relative.
• Effect on CCR flags
• N Set (1) if the result (destination) is
  negative, cleared (0) otherwise.
• Z Set if the result is zero, cleared otherwise.
• V Set if an overflow is generated, cleared
  otherwise.
• C Set if a carry is generated, cleared otherwise.
• X Set the same as the carry bit.
• The instructions SUB, SUBA, SUBQ, SUBI and SUBX
  are the
• subtraction equivalent of the corresponding ADD
  instructions.

34
68000 Arithmetic
Instructions

• DIVS, DIVU
• DIVU performs unsigned division, and DIVS
  performs signed
• division on two's complement numbers.
• The 32-bit long word in the data register is
  divided by the 16-bit word at the effective
  address.
• The 16-bit quotient is stored in the lower-order
  word of the register
• and the remainder is stored in the
  upper-order word.
• Source All modes except address register
  direct.
• Destination Data register.
• Effect on CCR flags
• N Set if the quotient is negative, cleared
  otherwise. Undefined if overflow or divide by
  zero occurs.
• Z Set if quotient is zero, cleared otherwise.
  Undefined if overflow or divide by zero occurs.
• V Set if division overflow occurs, cleared
  otherwise. Undefined if overflow or divide by
  zero occurs.
• C Always cleared.
• X Not affected.

35
Arithmetic Shift Left Instruction

• The arithmetic shift left operation ASL moves
  the bits of the operand
• the specified immediate number of positions in
  the range 1 to 8 to the left
• or by the value in a source data register modulo
  64 e.g.,
• ASL.B 3,D0
• Shifts the low byte of the D0 register 3
  positions to the left.
• This has the effect of multiplying by 2-cubed or
  8.
• As each bit is shifted left, it is stored in the
  Carry flag of the CCR.
• The vacant spot on the right is filled with a
  zero.
• For example
• D0.B
  00010111 Before
• 
  ASL.B 3,D0
• D0.B
  10111000 After

36
Arithmetic Shift Right Instruction

• The arithmetic shift right operation ASR
  moves the bits of the operand the
• specified immediate number of positions in
  the range 1 to 8 to the right or
• by the value in a source data register modulo
  64 e.g.,
• 
  ASR.B 3, D0
• Shifts the low byte of the D0 register 3
  positions to the right.
• This has the effect of dividing by 2 for each
  position shifted.
• For example
• D0.B
  00010111 Before
• ASR.B
  3, D0
• D0.B
  00000010 After
• The bit shifted off the right side is stored in
  the Carry flag of the CCR.
• On the left side, the MSB is propagated to the
  left
• (also called sign extension). For
  example
• D0.B
  11101001 Before
• ASR.B
  3,D0
• D0.B
  11111101 After

37
Example Setting Parity Bit of A Byte

• The following program sets the parity bit (msb)
  of a byte depending on the number of 1s in the
  byte.
• If number of ones is odd parity bit is set(
  1), otherwise 0
• D0 contains the byte of data whose parity bit
  is to be set
• D1 contains a counter which will range from 6
  to 0
• ORG 400 Program origin
• MOVE 6,D1 Set the counter to 6
• BCLR 7,D0 Clear the parity bit to start
• Next BTST D1,D0 Test the bit specified by D1
• BEQ Zero If the bit is 1 then toggle
  parity bit
• BCHG 7,D0 toggle the parity bit
• Zero SUB.B 1,D1 Decrement the counter
• BCC Next Check another bit
• STOP 2700
• END 400

38
Example Counting 6s in An Array

• A region of memory starting at location 1000
  contains an array of 20 one-byte values.
• This program counts the number of 6s in this
  array and stores the count in register D1.
• ORG 400 Program origin
• LEA Array,A0 A0 points to the start of the
  array
• MOVE.B 20,D0 20 values to examine
• CLR.B D1 Clear the 6s counter
• Next MOVE.B (A0),D2 Pick up an element from
  the array
• CMPI.B 6,D2 Is it a 6?
• BNE Not_6 IF not 6 THEN skip counter
  increment
• ADDQ.B 1,D1 IF 6 THEN bump up 6s counter
• Not_6 SUBQ.B 1,D0 Decrement loop counter
• BNE Next Repeat 20 times
• STOP 2700 Halt processor at end of program
• ORG 1000
• Array DC.B 1,6,4,5,5,6,2,5,6,7,6,6,6,1,3,5,9,6,7,
  5
• END 400