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Computer Organization

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Title: Computer Organization Author: sony Last modified by: jairam Created Date: 8/16/2006 12:00:00 AM Document presentation format: On-screen Show (4:3) – PowerPoint PPT presentation

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Title: Computer Organization


1
Computer Organization
Chapter 6 ARITHMETIC
  • Department of CSE, SSE Mukka

2
Addition and Subtraction of signed numbers
  • Sum si can be implemented with XOR gate.
  • Carry-out function ci1 can be implemented with a
    two-level AND-OR logic circuit.
  • A cascaded connection of n full adder blocks can
    be used to add two n-bit numbers called as
    n-bit ripple carry adder
  • The carry-in C0 into least significant-bit
    position provides a convenient means of adding 1
    to a number
  • For example forming 2s complement of a number
    involves adding 1 to 1s complement of the number

3
x
y
Carry-in
c
Sum
s
Carry-out
c
i
i
i
i
i
1
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
0
0
1
0
1
1
0
0
1
1
1
1
0
0
1
1
1
1
1
1
s
x
y
c
x
y
c
x
y
c
x
y
c




x
y
c
Å
Å

i
i
i
i
i
i
i
i
i
i
i
i
i
i
i
i
y
c
x
c
x
y
c



i
i
i
i
i
i
i
1
E
xample
x
7
1
0
1
1
X
Carry-out
Carry-in
i
y

Y


0
1
1
0
6

0
1
1
0
0
i
c
c
i
1
i
13
1
1
1
0
Z
s
i
Legend for stage
i
Figure 6.1. Logic specification for a stage of
binary addition.
4
y
i
c
i
x
i
x
i
c
y
s
c
i
i
i
1

i
c
i
x
y
x
i
i
i
y
i
Full adder
c
c
i
i
1

(F
A)
s
i
(a) Logic f
or a single stage
y
x
y
x
y
x
1
1
0
0
n
1
-
n
1
-
c
c
1
n
1
-
c
c
F
A
F
A
F
A
n
0
s
s
s
1
0
n
1
-
Most significant bit
Least significant bit
(MSB) position
(LSB) position
(b) An
n
-bit r
ipple-carr
y adder
y
x
y
x
x
y
y
x
y
x
n
n
0
n
1
-
0
n
1
-
2
n
1
-
2
n
1
-
k
n
1
-
k
n
1
-
c
n
n
-
bit
n
-
bit
n
-
bit
c
c
0
adder
adder
adder
k
n
s
s
s
s
s
s
n
0
k
1
-
(
)
n
n
1
-
2
n
1
-
k
n
1
-
(c) Cascade of k n-bit adders
Figure 6.2. Logic for addition of binary vectors.
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