Computer Organization

1
Computer Organization

• By
• Dr. M. Khamis
• Mrs. Duaa Al Sinari

2
Parity Checking

• Parity checking is used to check the correctness
  or erroneous of data.
• Circuit used to raise 1 on its output when its
  input data contain even number of 1s is called
  even parity circuit, otherwise it called odd
  parity circuit.
• Parity checking is used with memory to ensure the
  read data is exactly as written one or otherwise
  it interrupts the main processor. Also, it is
  used within the modem to ensure the correct
  arrival of the received data.

3
Parity Checking with the Main Memory
To interrut processor
Parity cct
Parity cct
4
How is parity circuits detect the error?

• The table depicts the expected output of the
  parity checking during reading data.
• Note that the output will be always1 when memory
  is defected, otherwise, it will be 0.

Original Correct defected
Data circuit circuit
Odd odd even
Even odd even
5
Design parity checking for 3-inputs

• For sake of simplicity 3-inputs are considered.
  The truth table will be as shown. The output (F)
  of the even parity circuit is 1 when the number
  of the 1s in the inputs are even.
• F xyz xyz xyz xyz
• (Draw the corresponding circuit for the above
  logic expression to get the odd parity circuit
  for 3-inputs)

x y z F
1 1 1 0
1 1 0 1
1 0 1 1
1 0 0 0
0 1 1 1
0 1 0 0
0 0 1 0
0 0 0 1
6
How to add binary numbers

• Consider adding two 1-bit binary numbers x and y
• 00 0
• 01 1
• 10 1
• 11 10
• Carry is x AND y
• Sum is x XOR y
• The circuit to compute this is called a half-adder

x y Carry Sum
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
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The half-adder

• Sum x XOR y
• Carry x AND y

8
Using half adders

• We can then use a half-adder to compute the sum
  of two Boolean numbers

0
0
1
1 1 0 0 1 1 1 0
0
1
0
?
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How to fix this

• We need to create an adder that can take a carry
  bit as an additional input
• Inputs x, y, carry in
• Outputs sum, carry out
• This is called a full adder
• Will add x and y with a half-adder
• Will add the sum of that to the carry in
• What about the carry out?
• Its 1 if either (or both)
• xy 10
• xy 01 and carry in 1

x y c carry sum
1 1 1 1 1
1 1 0 1 0
1 0 1 1 0
1 0 0 0 1
0 1 1 1 0
0 1 0 0 1
0 0 1 0 1
0 0 0 0 0
10
The full adder

• The HA boxes are half-adders

11
The full adder

• The full circuitry of the full adder

c
s
x
y
c
12
Adding bigger binary numbers

• Just chain full adders together

13
Adding bigger binary numbers

• A half adder has 4 logic gates
• A full adder has two half adders plus a OR gate
• Total of 9 logic gates
• To add n bit binary numbers, you need 1 HA and
  n-1 FAs
• To add 32 bit binary numbers, you need 1 HA and
  31 FAs
• Total of 4931 283 logic gates
• To add 64 bit binary numbers, you need 1 HA and
  63 FAs
• Total of 4963 571 logic gates

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More about logic gates

• To implement a logic gate in hardware, you use a
  transistor
• A transistor is a semiconductor device commonly
  used to amplify or switch electronic signals.
• Transistors are all enclosed in an IC, or
  integrated circuit
• The current Intel Pentium IV processors have 55
  million transistors!

15
Summary Digital Logic Basics

• Hardware consists of a few simple building blocks
• These are called logic gates
• AND, OR, NOT,
• NAND, NOR, XOR,
• Logic gates are built using transistors
• NOT gate can be implemented by a single
  transistor
• AND gate requires 3 transistors
• Transistors are the fundamental devices
• Pentium consists of 3 million transistors
• Compaq Alpha consists of 9 million transistors
• Now we can build chips with more than 100 million
  transistors

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Basic Concepts

• Simple gates
• AND
• OR
• NOT
• Functionality can be expressed by a truth table
• A truth table lists output for each possible
  input combination
• Precedence
• NOT gt AND gt OR
• F A B A B
• (A (B)) ((A) B)

17
Basic Concepts (cont.)

• Additional useful gates
• NAND
• NOR
• XOR
• NAND AND NOT
• NOR OR NOT
• XOR implements exclusive-OR function
• NAND and NOR gates require only 2 transistors
• AND and OR need 3 transistors!

18
Basic Concepts (cont.)

• Basic building block
• Transistor
• Three connection points
• Base
• Emitter
• Collector
• Transistor can operate
• Linear mode
• Used in amplifiers
• Switching mode
• Used to implement digital circuits

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Basic Concepts (cont.)

• Number of functions
• With N logical variables, we can define
• 22N functions
• Some of them are useful
• AND, NAND, NOR, XOR,
• Some are not useful
• Output is always 1
• Output is always 0
• Number of functions definition is useful in
  proving completeness property

20
Basic Concepts (cont.)

• Complete sets
• A set of gates is complete
• If we can implement any logical function using
  only the type of gates in the set
• You can uses as many gates as you want
• Some example complete sets
• AND, OR, NOT Not a minimal
  complete set
• AND, NOT
• OR, NOT
• NAND
• NOR
• Minimal complete set
• A complete set with no redundant elements.

21
Basic Concepts (cont.)

• Universal Gates A universal gate is a gate which
  can implement any Boolean function without need
  to use any other gate type.
• Proving NAND gate is universal
• NAND gate is called universal gate

an AND gate is typically implemented as a NAND
gate followed by an inverter not the other way
around!!
22
Basic Concepts (cont.)

• Proving NOR gate is universal
• NOR gate is called universal gate

an OR gate is typically implemented as a NOR gate
followed by an inverter not the other way
around!!
23
Logic Chips it is categorized according to the
complexity of their circuit.
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Logic Chips (cont.)

• Integration levels
• SSI (small scale integration)
• Introduced in late 1960s
• 1-10 gates (previous examples)
• MSI (medium scale integration)
• Introduced in late 1960s
• 10-100 gates
• Decoders, adders, multiplexers
• LSI (large scale integration)
• Introduced in early 1970s
• 100-10,000 gates
• Processors, memory chips
• VLSI (very large scale integration)
• Introduced in late 1970s
• More than 10,000 gates

25
Logic Functions

• Logical functions can be expressed in several
  ways
• Truth table
• Logical expressions
• Graphical form
• Example
• Majority function
• Output is 1 whenever majority of inputs is 1
• We use 3-input majority function

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Logic Functions (cont.)

• 3-input majority function
• A B C F
• 0 0 0 0
• 0 0 1 0
• 0 1 0 0
• 0 1 1 1
• 1 0 0 0
• 1 0 1 1
• 1 1 0 1
• 1 1 1 1

• Logical expression form
• F A B B C A C

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Logical Equivalence

• All three circuits implement F A B function

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Logical Equivalence (cont.)

• Proving logical equivalence of two circuits
• Derive the logical expression for the output of
  each circuit
• Show that these two expressions are equivalent
• Two ways
• You can use the truth table method
• For every combination of inputs, if both
  expressions yield the same output, they are
  equivalent
• Good for logical expressions with small number of
  variables
• You can also use algebraic manipulation
• Need Boolean identities

29
Logical Equivalence (cont.)

• Derivation of logical expression from a circuit
• Trace from the input to output
• Write down intermediate logical expressions along
  the path

30
Logical Equivalence (cont.)

• Proving logical equivalence Truth table method
• A B F1 A B F3 (A B) (A B) (A
  B)
• 0 0 0
  0
• 0 1 0
  0
• 1 0 0
  0
• 1 1 1
  1

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Introduction to Combinational Circuits

• Combinational circuits
• Output depends only on the current inputs
• Combinational circuits provide a higher level of
  abstraction
• Help in reducing design complexity
• Reduce chip count
• We look at some useful combinational circuits

32
Multiplexers

• Multiplexer
• 2n data inputs
• n selection inputs
• a single output
• Selection input determines the input that should
  be connected to the output

4-data input MUX
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Multiplexers (cont.)
4-data input MUX implementation
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Multiplexers (cont.)
MUX implementations
Majority function Odd-parity function
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Multiplexers (cont.)
Efficient implementation Majority function
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Demultiplexers (DeMUX)

• Demultiplexer
• a single input
• n selection inputs
• 2n outputs

37
Decoders

• Decoder selects one-out-of-N inputs

2?4 Decoder
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Decoders (cont.)
Logic function implementation A full adder
implementation
3? 8 Decoder
S(A,B,Cin)?(1,2,4,7) Cout(A,B,Cin)?(3,5,6,7)
39
Comparator

• Used to implement comparison operators ( , gt , lt
  , ? , ?)

XiAiBi AiBi for i0,1,2,3 (AgtB)A3B3
x3A2B2 x3x2A1B1 x3x2x1A0B0 (AltB)A3B3
x3A2B2 x3x2A1B1 x3x2x1A0B0
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Comparator (cont.)
AB Ox Ix (xAltB, AB, AgtB)
4-bit magnitude comparator chip
41
Comparator (cont.)
Serial construction of an 8-bit comparator
42
1-bit Comparator
xgty
CMP
xy
xlty
x
y
y
x
xgty
xy
xlty