Little- and big-endian memory organizations

1
Little- and big-endian memory organizations
2
ARM operating modes and register usage.
3
Exception vector addresses
4
The ARM condition code field
5
ARM condition codes
6
Branch and Branch with Link binary encoding
7
Branch (with optional link) and exchange
instruction binary encoding
(1)
BXBLX Rm
31
28
27
6
5
4
3
0
0 0 0 1 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0
cond
Rm
1
L
(2)
BLX label
31
28
27
25
24
23
0
24-bit signed word offset
1 1 1 1
1 0 1
H
8
Software interrupt binary encoding
9
Data processing instruction binary encoding
31
28
27
26
25
24
21
20
19
16
15
12
1
1
0
operand 2
cond
0 0

opcode
S
Rn
Rd
destination register
first operand register
set condition codes
arithmetic/logic function
25
1
1
8
7
0
8-bit immediate
rot
1
immediate alignment
1
1
7
6
5
4
3
0
Rm
shift
Sh
0
25
immediate shift length
0
shift type
second operand register
1
1
8
7
6
5
4
3
0
Rm
Rs
Sh
1
0
register shift length
10
ARM data processing instructions
11
Multiply instruction binary encoding
12
Multiply instructions
13
Count leading zeros instruction binary encoding
14
Single word and unsigned byte data transfer
instruction binary encoding
15
Half-word and signed byte data transfer
instruction binary encoding
16
Data type encoding
17
Multiple register data transfer instruction
binary encoding
18
Swap memory and register instruction binary
encoding
19
Status register to general register transfer
instruction binary encoding
20
Transfer to status register instruction binary
encoding
31
28
27
26
25
24
23
22
21
20
19
16
15
12
1
1
0
operand
cond
0 0

field
1 1 1 1
1 0
R
1 0
fi
eld mask
SPSR/CPSR
25
1
1
8
7
0
8-bit immediate
1
rot
immediate alignment
1
1
4
3
0
25
Rm
0
0 0 0 0 0 0 0 0
operand register
21
Coprocessor data processing instruction binary
encoding
22
Coprocessor data transfer instruction binary
encoding
23
Coprocessor register transfer instruction binary
encoding
24
Breakpoint instruction binary encoding
25
Arithmetic instruction extension space
26
Control instruction extension space
27
Data transfer instruction extension space
28
Coprocessor instruction extension space
29
Undefined instruction space
30
Summary of ARM architectures
Core
Architecture ARM1

v1 ARM2

v2 ARM2as, ARM3
v2a ARM6,
ARM600, ARM610
v3 ARM7, ARM700, ARM710
v3 ARM7TDMI, ARM710T,
ARM720T, ARM740T v4T StrongARM, ARM8,
ARM810
v4 ARM9TDMI, ARM920T, ARM940T
v4T ARM9ES

v5TE ARM10TDMI, ARM1020E
v5TE