MIPS%20Instructions

1
MIPS Instructions
2
Memory Operands

• Since variables (they are data) are initially in
  memory, we need to have data transfer
  instructions
• Note a program (including data (variables)) is
  loaded from memory
• We also need to save the results to memory
• Also when we need more variables than the number
  of registers we have, we need to use memory to
  save the registers that are not used at the
  moment
• Data transfer instructions
• lw (load word) from memory to a register
• st (store word) from register to memory

3
Specifying Memory Address

• Memory is organized as an array of bytes (8 bits)

4
Specifying Memory Address

• MIPS uses words (4 bytes)
• Each word must start at address that are
  multiples of 4
• This is called alignment restriction

5
Example of Endianness

• Store 0x87654321 at address 0x0000,
  byte-addressable

6
Example of Endianness

• Store 0x87654321 at address 0x0000,
  byte-addressable

7
Using Load and Store

• Memory address in load and store instructions is
  specified by a base register and offset
• This is called base addressing

8
Using Load and Store

• How to implement the following statement using
  the MIPS assembly we have so far?
• Assuming the address of A is in s3 and the
  variable h is in s2
• A12 h A8

9
MIPS Assembly Programs

• Consists of MIPS instructions and data
• Instructions are given in .text segments
• A MIPS program can have multiple .text segments
• Data are defined in .data segments using MIPS
  assembly directives
• .word, for example, defines the following numbers
  in successive memory words
• See Appendix A A.10 (pp. A-45 A-48) for details

10
First MIPS Assembly Program

• Compute the sum of first five homework assignment
  scores
• The scores are in memory
• We need to
• Load the address to a register
• Load the first two scores
• Add them
• Then load third score and add it to the sum and
  so on

11
First MIPS Assembly Program
12
Constant or Immediate Operands

• Many times we use a constant in an operation
• For example, i, i--, i 4, and so on
• More than half of the MIPS arithmetic
  instructions have a constant as an operand in
  SPEC2000 benchmarks
• Benchmarks are a set of programs specifically
  designed for evaluating and comparing performance
  of different choices
• Using the instructions so far, how can we do i
  4 ?

13
Example

• How do we implement i 4?
• Assume that s3 has variable i
• Since add needs three registers, we first need to
  load constant 4 into a register (for example t0)
• Then we have
• add s3, s3, t0
• Performance would not be good because every time
  we need a nonzero constant we have to load it
  from memory

14
C/C Example

• Suppose that ptr is defined as
• int ptr
• How do we translate ptr ?

15
C/C Example

• Suppose that ptr is defined as
• int ptr
• How do we translate ptr ?
• ptr ptr 4

16
Constant Operands

• Design principle Make the common case fast
• Since constant operands occur frequently, we
  should include constants inside arithmetic
  operations so that they are much faster
• MIPS has an add instruction that allows one
  operand to be a constant
• addi s1, s2, 100 s1 s2 100

17
Sum of Five Assignment Scores
18
Representing Instructions in Computers

• Note that computers only have 0s and 1s
• Before we can load MIPS instructions into memory,
  they need to be translated into machine
  instructions, which consist of only 0s and 1s
• In other words, we need to encode or represent
  instructions
• The symbolic representation of machine
  instructions is called assembly language
• The binary representation of instructions is
  called machine language
• A sequence of instructions in binary form is
  called machine code

19
Example
20
MIPS Instruction Encoding

• Each MIPS instruction is exactly 32 bits
• R-type (register type)
• I-type (immediate type)
• J-type (jump type)

21
MIPS Instruction Encoding
Instruction Format Op rs rt rd shamt funct address
add R 0 reg reg reg 0 32ten n.a.
sub (subtract) R 0 reg reg reg 0 34ten n.a.
add immediate I 8ten reg reg n.a. n.a. n.a. constant
lw (load word) I 35ten reg reg n.a. n.a. n.a. address
sw (store word) I 43ten reg reg n.a. n.a. n.a address
22
R-Type Encoding
23
R-Type Encoding
31
26
25
21
20
16
15
11
10
6
5
0
opcode
rs
rt
rd
shamt
funct
31
21
15
11
26
25
20
16
10
6
5
0
opcode
rs
rt
rd
shamt
funct
Encoding
24
R-Type Encoding
31
26
25
21
20
16
15
11
10
6
5
0
opcode
rs
rt
rd
shamt
funct
21
15
11
31
26
25
20
16
10
6
5
0
0
0
0
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
opcode
rs
rt
rd
shamt
funct
0
0
0
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
Encoding 0x01098022
25
I-type Encoding
26
I-type Encoding
31
26
25
21
20
16
15
0
opcode
rs
rt
Immediate Value
rt
Immediate
sw 5, 3000(2)
rs
31
26
25
16
15
21
20
0
opcode
rs
rt
Immediate Value
Encoding
27
I-type Encoding
28
I-type Encoding
31
26
25
21
20
16
15
0
opcode
rs
rt
Immediate Value
rt
Immediate
addi s0, s0, 95
rs
31
26
25
16
15
21
20
0
opcode
rs
rt
Immediate Value
Encoding
29
I-type Encoding
31
26
25
21
20
16
15
0
opcode
rs
rt
Immediate Value
rt
Immediate
addi s0, s0, 95
rs
31
26
25
21
20
16
15
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
1
1
0
0
opcode
rs
rt
Immediate Value
1
0
0
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
1
1
0
0
Encoding 0x2210005F
30
Translating Our First Program
Op rs rt address
35ten 19ten 8ten 1200ten
100011two 10011two 01000two 0000000000000100two
Op rs rt rd shamt funct
0ten 16ten 8ten 16ten 0ten 32ten
000000two 10000two 01000two 10000two 00000two 100000two
31
Program in Machine Language

• In SPIM, it can be done by using .word in .text
  segments

32
Assembler and Disassembler

• A program that translates instructions in
  assemble language to machine language is an
  assembler
• One of the jobs is to encode instructions
• Another one is to figure the addresses for
  various labels (will cover more later)
• SPIM is an assembler for MIPS assembly
• You will implement a simple assembler in Homework
  5
• Sometimes we may have to read programs in machine
  language
• It is very helpful if we can translate the
  instructions back to assembly language

33
Example
34
Disassembled Assembly
35
Disassembler for MIPS

• First we need to find out the op code in an
  instruction
• Based on the op code, we can determine the format
  (R-type, I-type, and J-type)
• R-type
• We need to find out the function code
• We can decode the registers and instruction name
  (mnemonic) (Fig. 2.25, p. 103)
• I-type and J-type
• Based on the op code, we can decode the
  instruction name and other fields accordingly
  (Fig. 2.25, p. 103)

36
R-Type Decoding
37
I-type Decoding
38
MIPS Disassembler Program (C/C)
Note that these data structures work properly
only on linprog
http//www.cs.fsu.edu/liux/courses/cda3100/inclas
sexamples/disassem.c http//www.cs.fsu.edu/liux/
courses/cda3100/inclassexamples/disassem.cpp
39
MIPS Disassembler Program (C)
40
MIPS Disassembler Program (C)
41
MIPS Disassembler Program (C)
42
Limited Support for I-type Instructions
43
Summary

• Instructions are commands that hardware
  understands
• Instructions are encoded using 0s and 1s
• This format is called machine language
• A sequence of instructions in this format is
  called machine code
• We can program in machine language directly
• That will be very painful and unproductive
• A more efficient way is to program using assembly
• We need to use an assembler to translate assembly
  programs into machine code
• Sometimes a disassembler may be useful

44
MIPS Instructions So Far

• Arithmetic instructions
• Each MIPS arithmetic instruction performs only
  one operation and has three operands
• All operands from registers
• Or one operand is an immediate (constant)
• Data transfer instructions
• Load from memory or store a register value to
  memory
• How to implement Ai using MIPS instructions?
• Instructions are encoded using 0s and 1s
• They are stored in memory along with data
• Stored-program concept

45
Logical Operations

• Often we need to operate on bit fields within a
  word
• For example, how to access a byte of word
• How to extract op code from an instruction?
• We need logical operations
• Which allow us to pack and unpack bits into words
  and perform logical operations such as logical
  and, logical or, and logical negation

46
Shifts

• Shift instructions move all the bits in a word to
  the left or to the right
• Shift left logical (sll) move all the bits to the
  left by the specified number of bits
• Shift right logical (srl) move all the bits to
  the right
• Filling the emptied bits with 0s

47
Example

• Suppose register s0 (16) is 9ten
• What do we have in t2 (10) after

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
48
Example

• Suppose register s0 (16) is 9ten
• We have in t2 (10) after
• The value is 144ten 9ten ? 24
• In general, shifting left by i bits gives the
  same result as multiplying by 2i

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0
49
Example

• Suppose register s0 (16) is 9ten
• We have in t2 (10) after
• The value is NOT 9ten ? 228
• Note that overflow happens this time

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
50
How to Extract Opcode and Other Fields

• We want to use the minimum number of instructions
• Extract the opcode?
• Shift the instruction to right by 26 bits
• How about rs?

51
How to Extract Opcode and Other Fields

• We want to use the minimum number of instructions
• Extract the opcode?
• Shift the instruction to the right by 26 bits
• How about rs?
• Shift the instruction to the left by 6 bits
• Then shift the result to the right by 27 bits

52
Shift Left Logical Instruction Encoding
31
26
25
21
20
16
15
11
10
6
5
0
opcode
rs
rt
rd
shamt
funct
rd
shamt
sll 10, 16, 4
rt
31
26
25
21
20
16
15
11
10
6
5
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
opcode
rs
rt
rd
shamt
funct
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
Encoding 0x00105100
53
Bit-wise AND

• Apply AND bit by bit
• The resulting bit is 1 if both of the input bits
  are 1 and zero otherwise
• There is also a version of AND with an immediate
• Note that the immediate is treated as an unsigned
  16-bit number
• In other words, the immediate is zero-extended to
  a 32-bit number

54
Bit-wise OR

• Apply OR bit by bit
• The resulting bit is 1 if at least one of the
  input bits is 1 and zero otherwise
• There are also two versions of OR
• As in andi, the immediate is treated as an
  unsigned 16-bit number

55
NOT

• Since NOT takes one operand and results in one
  operand, it is not included in MIPS as an
  instruction
• Because in MIPS each arithmetic operation takes
  exactly three operands
• Instead, NOR is included
• The resulting bit is 0 if at least one of the
  input bits is 1
• How to implement NOT using NOR?
• Using zero as one of the input operands
• It is included in MIPS as a pseudoinstruction

56
Instructions for Making Decisions

• A distinctive feature of programs is that they
  can make different decisions based on the input
  data

57
Instruction beq (branch if equal)

• To support decision making, MIPS has two
  conditional branch instructions, similar to an
  if statement with a goto
• In C, it is equivalent to
• Note that L1 is a label and we are comparing
  values in register1 and register2

58
Instruction bne

• Similarly, bne (branch not equal) means go to the
  statement labeled with L1 if the value in
  register1 does not equal to the value in regster2
• Equivalent to

59
Instruction j (jump)

• MIPS has also an unconditional branch, equivalent
  to goto in C
• Jump to the instruction labeled with L1

60
Compiling if-then-else

• Suppose variables f, g, h, i, and j are in
  registers s0 through s4, how to implement the
  following in MIPS?

61
Compiling if-then-else

• Suppose variables f, g, h, i, and j are in
  registers s0 through s4, how to implement the
  following in MIPS?

62
Compiling if-then-else

• Suppose variables f, g, h, i, and j are in
  registers s0 through s4, how to implement the
  following in MIPS?

63
MIPS Assembly for if-then-else

• Now it is straightforward to translate the C
  program into MIPS assembly

64
How to Encode Branch Instructions

• To encode these branch instructions, we first
  need to figure out the value for the associated
  label
• This will be done by the assembler
• Note that the MIPS has the alignment restriction,
  which means all the labels will be a multiple of
  4
• To increase the range, the address divided by 4
  is actually encoded
• In other words, the address is in terms of words
  (32 bits), rather than bytes

65
Encoding Conditional Branch Instructions

• It branches the number of the instructions
  specified by the offset if register rs equals to
  register rt
• In the stored-program concept, we implicitly need
  a register to hold the address of the current
  instruction being executed
• Which is called program counter (PC) (should be
  called instruction address register)
• What is the value of PC after we finish executing
  the current instruction?

66
Abstract View of MIPS Implementation
67
Encoding Conditional Branch Instructions

• PC-relative addressing
• The offset of conditional branch instructions is
  relative to PC 4
• Since all MIPS instructions are 4 bytes long, the
  offset refers to the number of words to the next
  instruction instead of the number of bytes

68
Example

• What is the encoding of
• In other words, what should be the offset?

69
Encoding bne
31
26
25
21
20
16
15
0
opcode
rs
rt
Immediate Value
rs
Label/Offset
bne 19, 20, Else
rt
31
26
25
21
20
16
15
0
0
1
0
1
1
0
0
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
opcode
rs
rt
Immediate Value
0
1
0
1
1
0
0
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
Encoding 0x16740002
70
Compiling a while loop in C

• How to translate the following to MIPS assembly?
• We first translate into a C program using if and
  goto

71
Compiling a while loop in C

• Assume that i and k correspond to registers s3
  and s5 and base array save is in s6

72
While Loop

• How many instructions will be executed for the
  following array save?
• Assume that k 10 and i 0 initially

73
Optimized While Loop

• How many instructions now?
• Assume k 10 and i 0 initially

74
Further Optimized

• How many instructions now?
• Assume k 10 and i 0 initially

75
Case/Switch Using Jump Address Table

• How to implement the following using MIPS
  assembly?
• We can use a sequence of if and goto statements
• We can also use a jump address table

76
Two Instructions

• Jump register (jr)
• Unconditionally jump to the address given by
  register rs
• Load address (la)
• Load the address of a label into the register
  (note not the content of the address)

77
Case/Switch Using Jump Address Table

• The program first determines the index into the
  table and then jump to the appropriate sequence