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Verilog HDL

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Verilog HDL 12 21 ( Verilog HDL ... – PowerPoint PPT presentation

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Title: Verilog HDL


1
Verilog HDL
  • 12?21?(?)

2
Verilog HDL??
  • ?????????????????
  • ???????????????????
  • ??????CAD????????????
  • C??????????????????

3
??????????
  • ??????(8bit????)???????
  • Verilog-HDL???????????????????(module)??????
  • module add8(a, b, s)
  • input 70 a, b
  • output 80 s
  • assign s a b
  • endmodule

a
add8
8
s
9
b
8
4
?????????
  • module ????? endmodule ????
  • ?????(??????)????
  • ????????(??????)???

??????
??????
??????
module add8(a, b, s) input 70 a, b output
80 s assign s a b endmodule
5
???????
  • ??? input
  • ??? output
  • ???????? ????????????

module add8(a, b, s) input 70 a, b output
80 s assign s a b endmodule
????
????
6
??????
  • assign ???????
  • ????????????????????

module add8(a, b, s) input 70 a, b output
70 s assign s a b endmodule
??????
7
???
  • ????????
  • ??
  • - ??
  • ??
  • ???????????
  • / ???

8
????????
????
???????
Total logic cells used ???????????? Total logic
cells used 15/576 (
2) 15??????????????
9
??
  • ?????Verilog??????????????????????????????????(???
    ??)?????
  • 8??????
  • (8????? 9?????)
  • 8??????
  • (8????? 9?????)
  • 8??????
  • (8????? 16?????)

10
  • ??????
  • ?????
  • ????????(Lach?D?JK, T)?????????
  • ???8????? or ???16?????
  • ???10?????
  • ???? ????????????
  • 8????? or 16?????
  • 10?????
  • 12?????
  • 8?????? (8????? 9?????)
  • 8?????? (8????? 9?????)
  • 8?????? (8????? 16?????)
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