Verilog HDL

1
Verilog HDL

• A Keypad Scanner/Encoder

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Keypad Scanner and Encoder
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Keypad Scanner and Encoder

• Each row of the keypad is connected to ground by
  a pull-down resistor.
• When a button is pressed, a connection is
  established between a row and a column.
• If that column line is connected to the supply
  voltage, the row that is connected to that column
  will be pulled to the supply.

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Waveform
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Implementation of A Encoding Scheme

• Three Parts
• Detects whether a button is pressed
• Identifies the button that is pressed
• Generates an output consisting of the unique code
  of the button.
• The coding values are shown in Table 1.

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Implementation of A Encoding Scheme
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Implementation of A Encoding Scheme

• The scanner/encoder will be implemented as a Auto
  State Machine (ASM).

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Implementation of A Encoding Scheme

• always _at_ (posedge clock or posedge reset)
• if (reset) state lt S_0
• else state lt next_state
• always _at_ (state or S_Row or Row)
• begin next_statestate Col0
• case (state)
• //Assert all columns
• S_0 begin Col15 if (S_Row) next_stateS_1
  end
• //Assert col 0
• S_1 begin Col1 if (Row) next_stateS_5
  else next_stateS_2end
• //Assert col 1
• S_2 begin Col2 if (Row) next_stateS_5
  else next_stateS_3end
• //Assert col
• S_3 begin Col4 if (Row) next_stateS_5
  else next_stateS_4end
• //Assert col 3
• S_4 begin Col8 if (Row) next_stateS_5
  else next_stateS_0end
• //Assert all columns
• S_5 begin Col15 if (Row0) next_stateS_0
  end

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Implementation of A Encoding Scheme

• First part how does it detect a button is
  pressed?
• The machine asserts a 1 simultaneously on all of
  the column lines until detecting that a row line
  has been pulled up.
• Synchronous Sequential Machine

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Implementation of A Encoding Scheme

• module Synchronizer (S_Row,Row,clock,reset)
• output S_Row //
• input 30 Row
• input clock,reset
• reg A_Row,S_Row
• always _at_ (negedge clock or posedge reset)
• begin
• if (reset) begin A_Rowlt0
• S_Rowlt0
• end
• else begin A_Rowlt(Row0Row1Row2
  Row3)
• S_RowltA_Row
• end
• end
• endmodule

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Implementation of A Encoding Scheme

• Second part identifies the button that is
  pressed to generate the row signal
• module Row_Signal (Row,Key,Col)
• endmodule

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Implementation of A Encoding Scheme

• Third part generates an output consisting of the
  unique code of the button.
• module Hex_Keypad (Code,Col,Valid,Row,S_Row,clock,
  reset)
• endmodule

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Test bench

• Clock generator
• initial 500 finish
• initial begin clock0 forever 5 clockclock
  end
• initial begin reset1 10 reset0 end
• Key generator
• initial begin
• for (k0klt1kk1)
• begin
• Key0
• 20 for (j0jlt16jj1)
• begin
• 20 Keyj1
• monitor("Codeb Validd Cold Rowd
  timed",Code,Valid,Col,Row,time)
• 60 Key0
• end
• end
• end