Tutorial 1 (Cadence)

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Tutorial 1 (Cadence)
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Installation of Cadence

• 1. Download the file named cds97a.env from the
  homepage into your root directory.
• 2. In the file .cshrc, add the code source
  cds97a.env.
• 3. Source the .cshrc at the first time of
  installation.
• 4. Make a working directory e.g. mkdir ele5260

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Installation of Cadence conv.

• Download the file named display.drf from the
  homepage into your working directory.
• In your working directory, type the following
  path /export_sun6/ams_v3.12/artist/bin/ams_cds
  -newtech -tech cup -tool artist
• Choose File ? Exit to quit the cadence
• installation complete

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Starting with Cadence

• In your working directory, type icfb to run
  Cadence.
• A Command Interpreter Window (CIW) will be loaded.

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Command Integreter Window (CIW)

• Open windows
• Start tools
• View prompts, error messages, and informational
  messages
• Make changes to your working environment
• Quit your design session

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Library Manager

• On the CIW, choose Tools ? Library Manager...
  to open the Library Manager

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Structure of Library Manager
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Creating new Library

• On the Library Manager, choose File ? New ?
  Library to create a Library

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Creating new Library
A window called New Library will be appeared.
You can define the name of the new library e.g.
hw1.
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Creating new Library
After you have defined the name, you have to
choose the technology file you want to use. In
this homework, you have to use the existing
technology file TECH_CUP
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Creating new Cell View
On the Library Manager, select the library you
have just created. Choose File ? New ? Cell
View to create a new cell view.
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Creating new Cell View
For schematic capture
The Cell Name is defined by the user
For symbol generation
For layout design (used in hw1)
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Creating new Cell View
A window called Create New File will be
appeared. You can define the name of the new Cell
e.g. inverter. The option View Name is target
specific, for example if you want to do a layout
design, you have to choose Virtuoso and the
View Name will be automatically set to layout
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Layout editor and LSW
Layout editor
LSW
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Layer and selection window LSW

• The layer and selection window (LSW) lets you
  choose the design layer for each shape you draw,
  make design objects visible or invisible, or make
  design objects selectable or unselectable.
• For layout drawing, we have to use the layers
  with the extension dg.
• dg drawing pn pin nt net.

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Layer and selection window LSW

• Common layers used
• 1. NTUB (dg) FIMP (dg)? N-Well
• 2. DIFF (dg) ? Active area
• 3. PPLUS (dg) ? P implant
• 4. NPLUS (dg) ? N implant
• 5. POLY1 (dg) ? Polysilicon
• 6. MET1 (dg) ? Metal 1
• 7. CONT (dg) ? Contact

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Layout Editor

• Common command used (pull down menu)
• 1. Design ? Save(F2) ? Save the design
• 2. Window ? Zoom in/out by 2 (Ctrl z/Shift
  z) ? zoom
• 3. Create ? Rectangle (r) ? create
  rectangular shape layer
• 4. Edit ? Undo/Redo (u/U) ? undo/redo process

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Layout Editor

• 5. Misc ? Ruler/clear Rulers (k/K) ? measure
  dimension
• 6. Edit ? Move (m) ? Move the object
• 7. Edit ? Copy (c) ? Copy the object
• 8. Edit ? Stretch (s) ? Stretch and change the
  dimension of the layer
• 9. Edit ? Delete (del) ? Delete the object

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Layout Editing
ruler
DIFF(dg)
Shortcut for ruler
Shortcut for create rectangle
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Procedure for Layout Editing

• Select the appropriate layout on the LSW
• Click the shortcut button of ruler or select
  the ruler from the pull down menu
• define the dimension of the layer on the layout
  editor
• Click the shortcut button of create rectangle
  or select it from the pull down menu
• Create the rectangle on the layout editor

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Design Rule Check

• On the Layout Editor, choose Verify ? DRC to
  check any violation of design rule.

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Design Rule Check

• A window named DRC would be appeared. All the
  settings remain unchanged and press OK.

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Design Rule Check

• If there is no design rule violation, a message
  Total errors found 0 will be appeared on the
  Command Interpreter Window.

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Design Rule Check

• If there is design rule violation, the errors
  encountered and the total number of errors will
  be appeared on the Command Interpreter Window.

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Design Rule Check

• On the Layout Editor, the layer encounters design
  rule violation will be covered by a Maker
  layer. Choose Verify ? Markers ? Explain and
  click on the Maker layer to check out the
  violated design rule. The error messages will be
  appeared on the marker text window.

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Design Rule Check
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Parameter Extraction

• We can extract all the parasitic capacitance from
  the layout. Choose Verify ? Extract to extract
  the parasitic capacitance.

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Parameter Extraction

• Type capall on the Switch Names or you can
  select it from the Set Switches item.

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Parameter Extraction

• In the extraction process, the errors encountered
  and the total number of errors will be appeared
  on the Command Interpreter Window.

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Parameter Extraction

• On the Library Manager, a new cell view called
  extracted is created. Double click the
  extracted view to open the extracted layout.

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Parameter Extraction

• The extracted parasitic capacitance is shown as a
  red rectangular box. It can be changed to symbol
  and text format by choosing Design ? Options ?
  Display. Change the display levels from 0 to 10
  instead of 0 to 0.

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Parameter Extraction
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Parameter Extraction
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Parameter Extraction
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End of Tutorial 1