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Synchronous Sequential Circuit Analysis

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State Memory A set of n edge-triggered flip-flops that store ... flops are triggered from the same master clock signal. All change state ... Characteristic ... – PowerPoint PPT presentation

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Title: Synchronous Sequential Circuit Analysis


1
  • Synchronous Sequential Circuit Analysis

2
Synchronous Sequential Circuit
  • State Memory A set of n edge-triggered
    flip-flops that store the current state of the
    machine
  • All flip-flops are triggered from the same master
    clock signal
  • All change state together
  • Combinational circuit
  • Next state logic
  • Output logic Mealy and Moore

Next State
Current State
3
Mealy Model
next state F (current state, inputs) outputs
G (current state, inputs)
4
Moore Model
next state F (current state, inputs) outputs
G (current state)
5
Analysis - Goals
  • Characterize as Mealy or Moore machine
  • Determine next state equations, i.e., find the
    function F
  • next state F (current state, inputs)
  • Determine output equations
  • Meally outputs F (current state, inputs), or
  • Moore outputs F (current state)
  • Express as machine behavior
  • State table, or
  • State diagram
  • Formulate English description of machine behavior

6
An example sequential circuit
  • A sequential circuit with two JK flip-flops
  • State or memory Q1Q0
  • One input X One output Z

7
State table of example circuit
8
Output Equations
  • From the diagram, you can see that
  • Z Q1Q0X
  • Mealy model circuit !!!

9
Next State Equations Q(t1)
  • Find the flip-flop input equations/excitation
    equations
  • Substitute excitation equations in the
    flip-flops characteristic equation

J1 X Q0 K1 X Q0 J0 X Q1 K0 X
10
Next State Equations Q(t1)
  • Excitation equations
  • J1 X Q0 and K1 X Q0
  • J0 X Q1 and K0 X
  • Characteristic equation of the JK flip-flop
  • Q(t1) KQ(t) JQ(t)
  • Next state equations
  • Q1(t1) K1Q1(t) J1Q1(t)
  • (X Q0(t)) Q1(t) X Q0 (t)
    Q1(t)
  • X (Q0(t) Q1(t) Q0(t) Q1(t))
  • X (Q0(t) ? Q1(t))
  • Q0(t1) K0Q0(t) J0Q0(t)
  • X Q0(t) (X Q1(t)) Q0(t)
  • X Q0(t) Q1(t)

11
State Table Next State Equations
  • Q1(t1) X (Q0(t) ? Q1(t))
  • Q10, Q00, X 0 gt Q1(t1) 0
  • Q0(t1) X Q0(t) Q1(t)
  • Q10, Q00, X 0 gt Q0(t1) 0

0 0
12
State Table Next State Equations
  • Q1(t1) X (Q0(t) ? Q1(t))
  • Q10, Q01, X 1 gt Q1(t1) 0
  • Q0(t1) X Q0(t) Q1(t)
  • Q10, Q01, X 1 gt Q0(t1) 1

0 0
0 1
13
State Table Next State Equations
  • Q1(t1) X (Q0(t) ? Q1(t))
  • Q0(t1) X Q0(t) Q1(t)

14
State Table Characteristic Table
  • The general JK flip-flop characteristic equation
    is
  • Q(t1) KQ(t) JQ(t)
  • We can also determine the next state for each
    input/current state combination directly from the
    characteristic table

15
State Table Characteristic Table
  • With these equations, we can make a table showing
    J1, K1, J0 and K0
  • for the different combinations of present state
    Q1Q0 and input X
  • J1 X Q0 J0 X Q1
  • K1 X Q0 K0 X

16
State Table Characteristic Table
17
State Table Characteristic Table
0
18
A different look
Present State Q1 Q0 Present State Q1 Q0 Next State Next State Next State Next State Output Z Output Z
Present State Q1 Q0 Present State Q1 Q0 Input X 0 Input X 0 Input X 1 Input X 1 X 0 X 1
0 0 0 0 0 1 0 0
0 1 1 0 0 1 0 0
1 0 1 1 0 1 0 0
1 1 0 0 0 1 0 1
19
State diagrams (Mealy model)
  • We can also represent the state table graphically
    with a state diagram
  • A diagram corresponding to our example state
    table is shown below

20
Sizes of state diagrams
  • Always check the size of your state diagrams
  • If there are n flip-flops, there should be 2n
    nodes in the diagram
  • If there are m inputs, then each node will have
    2m outgoing arrows
  • In our example,
  • We have two flip-flops, and thus four states or
    nodes.
  • There is one input, so each node has two outgoing
    arrows.

21
Another Mealy Circuit
22
Excitation Equations
  • D0 EN Q0 EN Q0
  • D1 EN Q1 EN Q1 Q0 EN Q1 Q0

23
Next State/Output Equations
  • Q0(t1) D0 EN Q0 EN Q0
  • Q1(t1) D1 EN Q1 EN Q1 Q0 EN Q1 Q0
  • MAX EN Q1 Q0

24
Mealy State Table
  • Q0(t1) D0 EN Q0 EN Q0
  • Q1(t1) D1 EN Q1 EN Q1 Q0 EN Q1 Q0
  • MAX EN Q1 Q0

Present State Q1 Q0 Present State Q1 Q0 Next State Next State Next State Next State Output MAX Output MAX
Present State Q1 Q0 Present State Q1 Q0 Input EN 0 Input EN 0 Input EN 1 Input EN 1 X 0 X 1
0 0 0 0 0 1 0 0
0 1 0 1 1 0 0 0
1 0 1 0 1 1 0 0
1 1 1 1 0 0 0 1
25
Mealy State Diagram
Present State Q1 Q0 Present State Q1 Q0 Next State Next State Next State Next State Output MAX Output MAX
Present State Q1 Q0 Present State Q1 Q0 Input EN 0 Input EN 0 Input EN 1 Input EN 1 X 0 X 1
0 0 0 0 0 1 0 0
0 1 0 1 1 0 0 0
1 0 1 0 1 1 0 0
1 1 1 1 0 0 0 1
26
Moore Circuit
X
Remove input connection to output logic gt Moore
machine
27
Next State/Output Equations
X
  • Q0(t1) D0 EN Q0 EN Q0
  • Q1(t1) D1 EN Q1 EN Q1 Q0 EN Q1 Q0
  • MAX Q1 Q0

28
Moore State Table
  • Q0(t1) D0 EN Q0 EN Q0
  • Q1(t1) D1 EN Q1 EN Q1 Q0 EN Q1 Q0
  • MAX Q1 Q0

Present State Q1 Q0 Present State Q1 Q0 Next State Next State Next State Next State Output MAX
Present State Q1 Q0 Present State Q1 Q0 Input EN 0 Input EN 0 Input EN 1 Input EN 1 Output MAX
0 0 0 0 0 1 0
0 1 0 1 1 0 0
1 0 1 0 1 1 0
1 1 1 1 0 0 1
29
Moore State Diagram
Present State Q1 Q0 Present State Q1 Q0 Next State Next State Next State Next State Output MAX Output MAX
Present State Q1 Q0 Present State Q1 Q0 Input EN 0 Input EN 0 Input EN 1 Input EN 1 X 0 X 1
0 0 0 0 0 1 0 0
0 1 0 1 1 0 0 0
1 0 1 0 1 1 0 0
1 1 1 1 0 0 0 1
30
State Transitions
  • MAX Output of the Mealy circuit
  • MAXS Output of the Moore circuit

31
Sequential circuit analysis summary
  • To analyze sequential circuits, you have to
  • Find Boolean expressions for the outputs of the
    circuit and the
  • flip-flop inputs
  • Use these expressions to fill in the output and
    flip-flop input columns
  • in the state table
  • Finally, use the characteristic equation or
    characteristic table of the
  • flip-flop to fill in the next state columns.
  • The result of sequential circuit analysis is a
    state table or a state
  • diagram describing the circuit
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