LICAS Electronics

1
LICAS Electronics

• Roy Wastie
• Oxford University

2
Overview

• Introduction.
• Long Line FSI Photodiode Amplifier.
• Short Line FSI Photodiode Amplifier.
• FSI ADC with USB2 DAQ.

3
LiCAS Principle
Internal FSI System Dz. Dx,Dy Da,Db between
cars
Extrenal FSI System measures Wall marker location
Straightness Monitor Dx,Dy Da,Db between cars
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FSI System
Amplitude Modulation _at_ f1
C-Band Amplifier (1520-1570)
Laser 1
Laser 2
Amplitude Modulation _at_ f2
Reference Interferometer
Splitter Tree
piezo
detector
Quill
Detectors
Retro Reflector
Buffer Memory
GLI
USB-2 Readout
Readout Board
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FSI photodiode Amplifier
Amplitude Modulation _at_ f1
C-Band Amplifier (1520-1570)
Laser 1
Laser 2
Amplitude Modulation _at_ f2
Reference Interferometer
Splitter Tree
piezo
detector
Quill
Detectors
Retro Reflector
Buffer Memory
GLI
USB-2 Readout
Readout Board
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Long Line FSI Photodiode Amplifier
/-2V
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Short Line FSI Photodiode Amplifier
/-3V
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FSI ADC BOARD
Amplitude Modulation _at_ f1
C-Band Amplifier (1520-1570)
Laser 1
Laser 2
Amplitude Modulation _at_ f2
Reference Interferometer
Splitter Tree
piezo
detector
Quill
Detectors
Retro Reflector
Buffer Memory
GLI
USB-2 Readout
Readout Board
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FSI ADC with USB2

• Why?
• Design
• USB2

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Why?

• Commercial ADC cards tend to use one ADC chip and
  a multiplexer to give may channels.
• High simultaneous data sample rate 2.88Ms/s.
• No room of PCI card
• ADC card close to amplifier electronics.
• Allows added functionality.
• General purpose peripheral
• In house interest in developing USB2 DAQ.

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Specification

• 16 channels.
• 2.88Ms/s.
• Simultaneous data sampling on all channels.
• 6U format
• USB2 interface
• 1.25V input range
• 14 bit resolution

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Block Diagram
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PCB Layout
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USB2

• Peer to Peer.
• Host computer is master.
• 480Mbits/s 53.24Mb/s theoretical
• 24Mb/s readily achievable in Bulk transfer mode.
• Hot Plug.
• Peripherals electronics can be relatively simple
  and inexpensive.
• Power 500mA from the bus.

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USB Data Travels in Packets

• Identified by Packet ID (PID)
• Token packet tells whats coming
• Data packets deliver bytes
• Handshake packets report success or otherwise

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USB Packets
D
C
D
S
S
S
A
C
S
E
A
C
S
E
A
A
R
A
O
Y
a
Y
Y
Y
D
R
Y
N
I
D
R
Y
N
C
T
C
C
U
N
t
N
N
N
D
C
N
D
N
D
C
N
D
K
A
1
K
T
C
a
C
C
C
R
5
C
P
R
5
C
P
1
6
H/S Pkt
Data Packet
Token Packet
Data Packet
H/S Pkt
Token Packet
Status Stage
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USB2 Development Board

• Single-chip integrated USB 2.0 Transceiver.
• Integrated 8051 Microprocessor.
• Code/Data Downloaded via USB, or EEPROM.
• Many Integrated Peripherals.

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Flexibility of Design

• Download Code both 8051 and FPGA.
• 1Mb of SRAM for Storage of data of code.
• FPGA can be used to implement pre-processing of
  the ADC data real-time.
• Compression
• Baseline subtraction
• Averaging
• RISC processor can be implemented in FPGA along
  side real-time hardware.