Title: Microfabrication
1Microfabrication
Nathaniel J. C. Libatique, Ph.D. nlibatique_at_gmail.
com
2Process Steps
- Start with polished wafers of chosen r and
crystal orientation - Films epitaxial, thermal oxides, polysilicon,
dielectrics, metals - Doping via diffusion or ion implantation
- Lithography shadow masked or projection
- Etching Wet and Dry
- Sequential Mask Transfer
- Stepper Iteration
Sze, Semiconductor Devices, John Wiley and Sons
3Wafer ? Die ? Device
Sze, Semiconductor Devices, John Wiley and Sons
4Ingredients
- Clean Rooms
- Exposure Techniques
- Masks
- Photoresist
- Pattern Transfer
- Etching
5Clean Room Technology
- Pinholes
- Constriction of I
- Short ckt
- Epitaxy Dislocations
- Gate Oxide Low Vb
Rule of Thumb particles greater than 1/10 of
Lmin is disruptive. Lmin 5 mm requires lt 0.5
micron dust particles
Sze, Semiconductor Devices, John Wiley and Sons
6Clean Room Technology
- Dust count should be four orders of magnitude
lower than ordinary room air. - Class 100 100 particles (half micron or
greater) per cubic foot 3500 particles per
cubic meter - If we expose a 125 mm wafer for 1 minute to a
laminar flow air stream at 30 m/min, how many
dust particles will land on the wafer in a class
10 clean room?
Sze, Semiconductor Devices, John Wiley and Sons
7Particle Emission
Sze, Semiconductor Devices, John Wiley and Sons
8Clean Room Classes
9Design
- Keep critical areas very small
- Separate working areas
- Slight overpressure in white areas
- Laminar flow boxes in poor air quality areas
10Comb Structure
White area for wafer and chip processing
11Ball Room Structure
Ceiling
Floor
HEPA filter high efficiency particulate air
filter, Ceiling to floor laminar flows,
Perforations in floor
12Exposure
Sze, Semiconductor Devices, John Wiley and Sons
13Goals
- Resolution
- Registration
- Throughput
? Yield and cost, complexity-function, power
dissipation, speed
14Shadow Printing
- lm (lg)1/2
- the gap g includes the resist layer
- l 0.4 um, g 50 um, 4 um
- l 0.25 um, g 15 um, 2 um
- Dust dimensions gt g can damage the mask!
15Projection Printing
- Avoids mask damage
- To increase resolution ? image a small portion at
a time - Large masks followed by 101 demag or
- 11 masks
- Tradeoff defect free masks vs. simpler optics
16Annular Field Scan
Sze, Semiconductor Devices, John Wiley and Sons
17Small-Field Raster Scan
Sze, Semiconductor Devices, John Wiley and Sons
18Reduction Step and Repeat
Sze, Semiconductor Devices, John Wiley and Sons
1911 Step and Repeat
Sze, Semiconductor Devices, John Wiley and Sons
20Resolution and DOF
Sze, Semiconductor Devices, John Wiley and Sons
21f/ f/D
D
f
f/5
f/32
http//en.wikipedia.org/wiki/F-number
22D
f
q
23CAD used to generate mask artwork Secondary chip
sites for process evaluation as well as for
alignment-registration
Mask defect density is a concern in mask
fabrication
24Yield vs Defect Density
Semicons Dirty Secret Y e-DA for one mask
level For multiple mask levels Y e-NDA
25Photolithography
26Response Curve
- Vertical axis Remaining after exposure and
development - Horizontal Axis Exposure
100
Solubility increases with exposure for a positive
resist
Completely soluble. Measure of sensitivity for
ve resist
ET
E1
27Finite Solubility
Negative resist cross linked polymers
insoluble Positive resist exposed areas become
soluble
ET threshold energy, E1 drawn from tangent at
ET (ve)
28Post-Etch
29gamma solubility with incremental energy
increase, contrast ratio, sharpness
30- Negative resists lower exposure times due to
higher sensitivity ? high throughput - Positive resists does not swell significantly
unlike negative resists ? high resolution
CRM Grovenor, Microelectronic Materials
31Sites
- http//jas.eng.buffalo.edu/education/fab/NMOS/nmos
.html - http//www.ecse.rpi.edu/schubert/Course-ECSE-6290
- http//www.nikon.com/about/technology/core/optical
_u/evanescent_e/index.htm