Registers

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ECE U322Digital Logic Design
Oct. 20, 2005

• Lecture 18
• Shift Registers
• Stack (ECEU323 Lab 4)
• Reading Marcovitz 8.1
• Homework Due

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D Flip-Flop
preset
S
clear
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D Flip-Flop Timing
D
C
QFF
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Register with Parallel Load
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Shift Registers

• Registers capable of shifting stored bits
  laterally in one or both directions.

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4-bit Shift Register
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Simple Shift Register

• T0 is the register state just before the first
  clockpulse occurs
• T1 is after thefirst pulse andbefore the
  second.
• Initially unknownstates are denoted ?

B
A
C
Out
In
D
Q
D
Q
D
Q
D
Q
Clock CP
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Parallel Load Shift Registers
DA
DB

• By adding a muxbetween each shift register
  stage, data can be shifted or loaded
• If SHIFT is low,A and B arereplaced by the data
  on DA and DB lines, else data shifts right on
  each clock.
• By adding more bits, we can make n-bit parallel
  load shift registers.

A
B
D
D
IN
Q
Q
SHIFT
CP
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Shift Register Operations

• Shift Registers can
• load new data
• shift left or right
• shift in both directions
• clear
• hold their current contents
• A given shift register does a subset of these
  operations

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Shift Register with Parallel Load
Symbol
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• Unidirectional shift register
• Capable of shifting in only one direction.
• Bi-directional shift register
• Can shift in both directions.

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Bi-directional Shift Register
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Function Table
Symbol
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Stack in ECEU323 Lab 4

• Also called a LIFO Last In First Out
• Operations
• push new data on the stack
• pop data off the stack
• hold current data

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Stack for lab
There is also a reset signal not shown. Reset -
asynchronously clears the contents of the stack.
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Stack in ECEU323 Lab 4

• Output
• the current top of the stack
• NOTE once data has been popped from the stack
  it is gone
• Not like a computer pop instruction that returns
  the value popped from the stack.

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Stack Behavior
Push 5
Push 3
Push 4
5
4
4
3
Pop
Pop
Pop
4
3
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Implement the Stack

• Why is hold needed ?

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Stack out of shift registers

• Stack is five bits wide, four entries deep
• In lab, implement stack out of shift registers
• How to arrange shift registers to implement the
  stack
• What are shift inputs? outputs?
• How to clear the stack?

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SR4CLED symbol
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SR4CLED function table
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Stack out of shift registers

• Need logic to translate stack control inputs to
  shift register inputs
• stack control inputs s10
• shift register inputs
• CE clock enable
• L Load
• LEFT Shift Left
• CLR asynchronous clear