multi-valued intro

1
Multiple-Valued Logic
Introduction
By Marek Perkowski Some slides of M. Thornton used
2
Introduction What is the sense in MV logic
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THE MULTIPLE-VALUED LOGIC.

• What is it?
• WHY WE BELIEVE IT HAS A BRIGHT FUTURE.
• Research topics (not circuit-design oriented)
• New research areas
• The need of unification

4
Is this whole a nonsense?

• When you ask an average engineer from industry,
  he will tell you multi-valued logic is useless
  because nobody builds circuits with more than two
  values
• First, it is not true, there are such circuits
  built by top companies (Intel Flash Strata)
• Second, MV logic is used in some top EDA tools as
  mathematical technique to minimize binary logic
  (Synopsys, Cadence, Lattice)
• Thirdly, MV logic can be realized in software and
  as such is used in Machine Learning, Artificial
  Intelligence, Data Mining, and Robotics

5
Short Introduction multiple-valued logic
Signals can have values from some set, for
instance 0,1,2, or 0,1,2,3
0,1 - binary logic (a special case) 0,1,2 - a
ternary logic 0,1,2,3 - a quaternary logic, etc
1
Minimal value
1
2
21
23
Maximal value
2
3
23
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Binary logic is doomed

• It dominates hardware since 1946
• Many researchers and analysts believe that the
  binary logic is already doomed - because of
  Moore's Law
• You cannot shrink sizes of transistors
  indefinitely
• We will be not able to use binary logic alone in
  the generation of computer products that will
  start to appear around 2020.

7
Quantum phenomena

• They will have to be considered in one way or
  another
• It is not sure if standard binary logic will be
  still a reasonable choice in new generation
  computing
• Biological models

8

Future Edge of MVL

• Chip size and performance are increasingly
  related to number of wires, pins, etc., rather
  than to the devices themselves.
• Connections will occupy higher and higher
  percentage of future binary chips, hampering
  future progress around year 2020.
• In principle, MVL can provide a means of
  increasing data processing capability per unit
  chip area.
• MVL can create automatically efficient programs
  from data

9
From two values to more values

• The researchers in MV logic propose to abandon
  Boolean principles entirely
• They proceed bravely to another kind of logic,
  such as multi-valued, fuzzy, continuous, set or
  quantum.
• It seems very probable, that this approach will
  be used in at least some future calculating
  products.

10
Multi-Valued Logic Synthesis(cont)

• The MVL research investigates
• Possible gates,
• Regular gate connection structures (MVL PLA),
• Representations - generalizations of cube
  calculus and binary decision diagrams (used in
  binary world to represent Boolean functions),
• Application of design/minimization algorithms
• General problem-solving approaches known from
  binary logic such as
• generalizations of satisfiability, graph
  algorithms or spectral methods,
• application of simulated annealing, genetic
  algorithms and neural networks in the synthesis
  of multiple valued functions.

11
Binary versus MV Logic Synthesis Research

• There is less research interest in MVL because
  such circuits are not yet widely used in
  industrial products
• MV logic synthesis is not much used in industry.
• Researchers in hundreds
• Only big companies, military, government. IBM
• The research is more theoretical and fundamental.
• You can become a pioneer it is like Quine and
  McCluskey algorithm in 1950
• Breakthroughs are still possible and there are
  many open research problems
• Similarity to binary logic is helpful.

12
However,

• if some day MV gates were introduced to practical
  applications, the markets for them will be so
  large that it will stimulate exponential growth
  of research and development in MV logic.
• and then, the accumulated 50 years of research in
  MV logic will prove to be very practical.

13
Applications

• Image Processing
• New transforms for encoding and compression
• Encoding and State Assignment
• Representation of discrete information
• New types of decision diagrams
• Generalized algebra
• Automatic Theorem Proving

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History and Concepts
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The Shortest History of Multi-Valued Logic
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Jan Lukasiewicz (1878-1956)

• Polish minister of Education 1919
• Developed first ternary predicate calculus in
  1920
• Many fundamental works on multiple-valued logic
• Followed by Emil Post,
• American logician born in Bialystok, Poland

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Literals
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MV functions of single variable

• Post Literals

2
2
2
1
1
1
0 1 2
0 1 2
0 1 2

• Generalized Post Literals

2
2
2
1
1
1
0 1 2
0 1 2
0 1 2
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MV functions of single variable (cont)

• Universal Literals

0 1 2
2
2
1
1
0 1 2
0 1 2
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Multiple-Valued Logic

• Let us start with an example that will help to
  understand,
• Suppose that we have the following table, and we
  need to build a circuit with MV-Gates, (MAX
  MIN).
• As we can see, this is ternary logic.

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a b c 0 1 2
00 2 2 2
01 - - 0,2
a0,1 b0,1
02 1 1 0,1
10 2 2 -
b0,1 c1,2
11 2 2 -
12 0 0 0
a0,1 b0,1 b0,1 c1,2 Covering 2s in the map
20 1 2 2
21 - 2 2
22 0 0 -
22
ab c 0 1 2
00 - - -
a0
01 - - -
02 1 1 1
10 - - -
11 - - -
b0,1
12 0 0 0
20 1 - -
21 - - -
1.a0,1 1.b0,1 Covering 1s in the map
22 0 0 -
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MVL Circuits
MAX-gate
MIN-gate
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SOP a0,1 b0,1 b0,1 c1,2 1.a0,1 1.b0,1
a 0,1
Min
b 0,1
Min
c 1,2
Max
f
Min
1
Min
1
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Example of Application of logic with MV inputs
and binary outputs to minimize area of custom PLA
with decoders.

• Pair of binary variables corresponds to
  quaternary variable X
• abX012
• abX013

0 1
a b
a b X023
0 1
0 1 2 3
a b X123
(a b) (ab) X023 X013
Thus equivalence can be realized by single column
in PLA with input decoders instead of two columns
in standard PLA
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Multiple Valued Logic

• Currently Studied for Logic Circuits with More
  Than 2 Logic States
• Intel Flash Memory Multiple Floating Gate
  Charge Levels 2,3 bits per Transistor
• http//www.ee.pdx.edu/mperkows/ISMVL/flash.html
• Techniques for Manipulation Applied to
  Multi-output Functions
• Characteristic Equation
• Positional Cube Notation (PCN) Extensions

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MVI Functions

• Each Input can have Value in Set 0, 1, 2, ...,
  pi-1

• MVI Functions
• X is p-valued variable
• literal over X corresponds to subset of values of
  S ? 0, 1, ... , p-1 denoted by XS

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MVL Literals

• Each Variable can have Value in Set 0, 1, 2,
  ..., pi-1
• X is a p-valued variable
• MVL Literal is Denoted as Xj Where j is the
  Logic Value
• Empty Literal X?
• Full Literal has Values S0, 1, 2, , p-1
• X0,1,,p-1 Equivalent to Dont Care

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MVL Example

• MVI Function with 2 Inputs X, Y
• X is binary valued 0, 1
• Y is ternary valued 0, 1, 2
• n2 pX2 pY3
• Function is TRUE if
• X1 and Y 0 or 1
• Y2
• SOP form is
• F X1Y0,1 X0,1Y2
• Literal X0,1 is Full, So it is Dont Care
• implicant is X1 Y0,1
• minterm is X 1Y0
• prime implicants are X1 and Y2

X
F
0 1
0 1
1 1
2 1 1
Y
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MVL to encode binary logic
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PLA with decoders
Standard PLA
X012
x
a b
X013
x
X023
x
X123
Y012
x
cd
Y013
x
Y023
Y123
x
x
x
ZT1T2
decoders
T1 (a ? b) (c ? d)
T2 (a b) (c d)
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PLA with decoders

• Such PLAs can have much smaller area thans to
  more powerful functions realized in columns
• The area of decoders on inputs is negligible for
  large PLAs
• Multi-valued logic is used to minimize mv-input,
  binary-output functions with capital letter
  inputs X,Y,Z,etc.

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Multi-output Binary Function

• Consider

x
f0
y
f1
z
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Multi-output Binary Function
Characteristic Equation

• Consider

W
x
F
y
z
x
f0
y
f1
z
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Characteristic Equation
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Characteristic Equation
Sum of Minterms
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Positional Cube Notation (PCN) for MVL Functions
? 00
0 10
1 01
11

• Binary Variables, 0,1,
• Represented by 2-bit Fields
• MV Variables, 0,1,,p-1, Represented by p-bit
  Fields
• BV Dont Care is 11
• MV Dont Care is 1111
• MV Literal or Cube is Denoted by C(?)

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PCN for MVL Example

• Positional Cube Corresponding to X1 is C(X1)

 

• Since Y0,1,2 is Dont Care

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PCN for MVI-BO Example
z
a b f1 f2 f3
a? b? 10 10 100
a? b 10 01 001
a b? 01 10 001
a b 01 01 110

• View This as a SOP of MVI Function

• F is the Characteristic Equation

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List Oriented Manipulation

• Size of Literal Cardinality of Logic Value Set
• x0,2 ? size 2
• Size of Implicant (Cube, Product Term) Integer
  Product of Sizes of Literals in Cube
• Size of Binary Minterm 1 ? Implicant of Unit
  Size
• EXAMPLE f (x1,x2,x3,x4,x5,x6)

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Logic Operations

• Consider Implicants as Sets
• Apply (?, ?, ?, etc)
• Apply Bitwise Product, Sum, Complement to PCN
  Representation
• Bitwise Operations on Positional Cubes May Have
  Different Meaning than Corresponding Set
  Operations
• EXAMPLE
• Complement of Implicant ? Complement of
  Positional Cube

42
MVL Logical Operations

• AND Operation MIN - Set Intersection
• OR Operation MAX - Set Union
• NOT Operation Set Complement

EXAMPLE
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MVL Number of Functions of 1 Variable
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Example of MV function minimization
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Cube Merging

• Basic Operation OR of Two Cubes
• MVL Operation MAX is Union of Two Cubes
• EXAMPLE
• ? 1 0,1 0 1? 0 0,1 0 1
• Merge ? and ? into ?
• ? 0,1 0,10 1

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Multi-Output Minimization Example
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Minimization Example (cont)
Sum of Minterms (Fig. 10.7 PLA Implementation)
Merging

• Merge 1st and 2nd
• Merge 3rd and 4th
• Merge 5th and 6th
• Merge 7th and 8th

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Minimization Example (cont)
Multi-Output Function Using of Multi-Output
Prime Implicants (Fig. 10.8 PLA Implementation)
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History again
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Why we need Multiple-Valued logic?

• In new technologies the most delay and power
  occurs in the connections between gates.
• When designing a function using Multiple-Valued
  Logic, we need less gates, which implies less
  number of connections, then less delay.
• Same is true in case of software (program)
  realization of logic
• Also, most the natural variables like color, is
  multi-valued, so it is better to use multi-valued
  logic to realize it instead of coding it into
  binary.

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• In multi-valued logic, the binary AND gate is
  replaced by MIN gate, and OR by MAX
• But, AND can be also replaced by arithmetic
  multiplication, or modulo multiplication, or
  Galois multiplication
• OR can be also replaced by modulo addition, or by
  Galois addition, or by Boolean Ring addition, or
  by..

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• Finally, the number of values in infinite
• This way we get Lukasiewicz logic, fuzzy logic,
  possibilistic logic, and so on
• Continuous logics
• There are very many ways of creating gates in MVL
• They have different mathematical properties
• They have very different costs in various
  technologies
• The values and operators can describe time, moral
  values, energy, interestingness, utility,
  emotions.

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Mathematical, logical, system science, or
psychological/ methodological/ philosophical
foundations

• Functional completeness theory studies the
  construction of logical functions from a set of
  primitives and enumeration of bases.
• The problems which are investigated include
• classification of functions
• enumeration of bases of a closed subset of the
  set of all k-valued logical functions
• study of particular kinds of functions (monotone,
  symmetric, predicate, etc.) in multi-valued
  logics.

54
Are we sure that Lukasiewicz was the first human
who had these ideas?

• Some Chinese philosophers claim that the Buddhist
  logic, invented Before Christ Era, was very
  similar to fuzzy logic
• Raymon Lullus (Ramon Llull) invented many
  concepts that were hundreds years ahead of his
  time

55
Raymon Lullus, 1235-1316 (probably)
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• Creator of Cartesian Product
• Creator of binary counting system
• Creator of multi-valued logic and counting system
• Creator of the concept of logic computer

57
Lotfi Zadeh (1921- )

• Father of Fuzzy Logic
• Professor of University of California in Berkeley
• First paper on fuzzy logic published in 1956

58
Continuous Logic
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Continuous Logic

• From two values to many values to infinite number
  of values
• Fuzzy logic (Lotfi Zadeh),
• Lukasiewicz logic,
• Probabilistic logic,
• Possibilistic logic,
• Arithmetic logic,
• Complex and Quaternion logic,
• other continuous logics
• Find now applications in software and in
  hardware
• Are studied now outside the area of MV logic,
  but historically belong to it.

60
ExampleArithmetic Logic

• A?B AB - AB

We express logic operators by arithmetic operators
Arithmetic sum
Logic sum
A0.5 B0.5 then result 0.50.5-0.50.51-0.25
0.75
1-(1-A)(1-B)1-(1-A-BAB)AB-AB
This corresponds to probabilistic reasoning
61
ExampleArithmetic Logic

• A? B AB - 2AB

We express logic operators by arithmetic operators
Various operators can be defined to model certain
reasonings and because their hardware realization
is simple
Arithmetic sum
Logic exor
A0.5 B0.5 then result 0.50.5-20.50.51-0.5
0.5
A? B AB AB(1-A)BA(1-B)-(1-A)B(1-B)AB-ABA
-AB-AB(1-A)(1-B)AB-2AB-AB(1-A-BAB)
In this definition, the same results for natural
numbers 0 and 1, but slightly different for
AB0.5
Check it, define other operators of similar
properties.
62
Functional Representations in Logic Synthesis

• New representations aim at more compact
  representation of discrete data that allows
• less memory space,
• smaller processing time.
• Data can be functions, relations, sets of
  functions and sets of relations.
• Result of logic synthesis is a computer program
  for a robot
• Logic Synthesis Automatic Program Synthesis
• Good synthesis better program (smaller, faster,
  more reliable - noise, generalization)

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• Examples of representations
• 1. Cube Representation and the corresponding
  Cube operations (Cube Calculus).
• 2. Decision Diagram (DD) Representation and
  the corresponding DD operations.
• 3. Labeled Rough Partitions encoded with BDDs.

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• Cube Representations
• 1-a. Graphical Cube Representations of
• Multi-Valued Input Binary Output.

c d
00 01 02 10 11 12 20 21 22
a b
00 01 02 10 11 12 20 21 22
1 1 0 1 1 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 1 0 1 1 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0
Cube
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• 1-b. Expression (Flattened Form)
• Representation of Cubes of Multi-
  
• Valued Input Binary Output .
• For the previous example -
• F 1.a0b0c0d0 1.a0b0c0d1 1.a0b0c1d0
• 1.a0b0c1d1 1.a1b0c0d0 1.a1b0c0d1
  
• 1.a1b0c1d0 1.a1b0c1d1
• 1 . a 0,1 b0c 0,1 d 0,1

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• Tabular Representation

Functions and Relations are just mappings
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• To recognize faces we obtain the following
  tabular representation -

Output is a relation due to the imprecise
measurements of S
Input Features
Person
N H M S
John 1 1 1 1,2
Peter 2 0 1 0,1
Philip 0 1 0 1,2
Cubes
Ken 2 0 2 2
68
Multi-valued Logic
To get its Decision Diagrams, we follow these
steps.
Step 1 Expand the function with respect to
variable a,b and c.
Expand the function with respect to variable a
first.
f
a
0
2
1
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Multi-valued Logic
When a0, expand the function with respect to b
and c.
b
0
1
2
0
2
0
2
1
1
Because this group can be 1, the 0 can be
ignored
1
1
2
0,1
1
2
0,1
f equals 1 here no matter if c is 0, 1 or 2, so
it terminals at 1.
70
Multi-valued Logic
a1
b
0
1
2
0
2
1
0
2
0
0
2
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Multi-valued Logic
a2
b
0
1
2
2
0
1
0
2
0
2
0
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Multi-valued Logic
Step 2 Draw the Decision Tree
f
a
0
2
1
b
b
b
2
0
0
1
2
0
1
2
1
c
c
1
c
0
2
c
0
2
0
2
1
0
2
1
0
2
1
0
2
1
1
2
1
1
2
1
0
0
2
0
0
2
Choice done for simplification
73
Multi-valued Logic
Step 3 Combine the same terminals to get
Decision Diagram
f
a
0
2
1
b
b
b
1
0
0
1,2
1
0
2
2
c
c
2
0,2
1
1
0,1
2
0
1
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FUTURE RESEARCH AREAS AND ANALOGIES
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First Extension from Binary
Binary Logic ------------ MV Logic
And Gate ----------------------- MIN
gate Or Gate -------------------------- MAX
gate Inverter --------------------------
Literal
Post, generalized Post or Universal
This is standard, many published results, both
two-level and multi-level, complete system
76
Second Extension from Binary
Binary Logic ------------ MV Logic
And Gate lt---------------------? Galois
Multiplication gate EXOR Gate
lt--------------------? Galois Addition
gate Inverter lt------------------------?
Power of variable
This system was introduced by Pradhan and Hurst,
few papers have been published, no software, most
is two-level logic
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Another very recent extension
Binary Logic ------------ MV Logic
And Gate ?-------------------? MIN
gate Exor Gate ?-----------------------?
MODSUM gate Inverter ?-----------------------
? Literals
Perhaps universal literals will increase the
power, not investigated yet
This system was introduced by Muzio and Dueck and
independently by Elena Dubrova in her Ph.D. Two
papers have been published. Recent interest.
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Problems to think about

1. What is multivalued logic.
2. Can multi-valued logic be used to synthesize
   binary circuits?
3. Ternary logic, prime implicants and covering.
4. Continuous and Arithmetic logic
5. Multi-valued decision trees and diagrams.
6. Types of MV literals.
7. Types of MV logic.
8. PLA with decoders and how it relates to MV logic.