Fetch And Add

1
Fetch And Add switching network
S S inc as executed by 8 processors
2 5
3 2
9 4
inc
7 1
9
2
7
3
5 13
7 8
5
7
15
18
15
First Stage Incrementing Memory
S 33
register
S memory
2
Fetch And Add switching network
S S inc
S 12 17 24 25
28 30 39 43

2 5
3 2
9 4
Inc
7 1
39
24 25
10
12 17
28 30
9
2
7
3
25 30
10 17
5
7
10
25
15
Second Stage Returning Value O (log P)
S 10
Left pass up Right register
S 10 33
S memory