Title: Midterm 1 Revision
1Midterm 1 Revision
Lecture 8
- Prof. Sin-Min Lee
- Department of Computer Science
2(No Transcript)
3(No Transcript)
4(No Transcript)
5(No Transcript)
6(No Transcript)
7(No Transcript)
8(No Transcript)
9(No Transcript)
10(No Transcript)
11(No Transcript)
12(No Transcript)
13(No Transcript)
14(No Transcript)
15(No Transcript)
16(No Transcript)
17(No Transcript)
18(No Transcript)
19Truth table to K-Map
B A 0 1
0 1 1
1 1
A B P
0 0 1
0 1 1
1 0 0
1 1 1
minterms are represented by a 1 in the
corresponding location in the K map.
The expression is A.B A.B A.B
20K-Maps
- Adjacent 1s can be paired off
- Any variable which is both a 1 and a zero in this
pairing can be eliminated - Pairs may be adjacent horizontally or vertically
B A 0 1
0 1 1
1 1
a pair
B is eliminated, leaving A as the term
another pair
A is eliminated, leaving B as the term
The expression becomes A B
21A B C P
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
A.B.C A.B.C A.B.C
BC A 00 01 11 10
0 1
1 1 1
One square filled in for each minterm.
Notice the code sequence 00 01 11 10 a Gray
code.
22Grouping the Pairs
BC A 00 01 11 10
0 1
1 1 1
equates to B.C as A is eliminated.
Here, we can wrap around and this pair equates
to A.C as B is eliminated.
Our truth table simplifies to A.C B.C as
before.
23Groups of 4
Groups of 4 in a block can be used to eliminate
two variables
BC A 00 01 11 10
0 1 1
1 1 1
The solution is B because it is a 1 over the
whole block (vertical pairs) BC BC B(C C)
B.
24Karnaugh Maps
- Three Variable K-Map
- Extreme ends of same row considered adjacent
A BC
00
01
11
10
0
1
10
00
25Karnaugh Maps
- Three Variable K-Map example
A BC
00
01
11
10
0
1
X
26The Block of 4, again
A BC
00
01
11
10
0
1
1
1
1
1
X C
27Returning to our car example, once more
A B C P
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
A.B.C A.B.C A.B.C
AB C 00 01 11 10
0 1 1 1
1
There is more than one way to label the axes of
the K-Map, some views lead to groupings which are
easier to see.
28Karnaugh Maps
- Four Variable K-Map
- Four corners adjacent
AB CD
00
01
11
10
00
01
11
10
29Karnaugh Maps
- Four Variable K-Map example
AB CD
00
01
11
10
00
01
11
10
F
30(No Transcript)
31Product-of-Sums
We have populated the maps with 1s using
sum-of-products extracted from the truth
table. We can equally well work with the 0s
A B C P
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
AB C 00 01 11 10
0 0
1 0 0 0
AB C 00 01 11 10
0 1 1 1
1 1
P (A B).(A C) P A.B A.C
equivalent
32Inverted K Maps
- In some cases a better simplification can be
obtained if the inverse of the output is
considered - i.e. group the zeros instead of the ones
- particularly when the number and patterns of
zeros is simpler than the ones
33Karnaugh Maps
- Example Z5 of the Seven Segment Display
X1 X2 X3 X4 Z5
0 1 2 3 4 5 6 7 8 9
0 0 0 0 1
0 0 0 1 0
X1X2 X3 X4
00
01
11
10
0 0 1 0 1
0 0 1 1 0
00
0 1 0 0 0
01
0 1 0 1 0
11
0 1 1 0 1
0 1 1 1 0
10
1 0 0 0 1
1 0 0 1 0
Z5
1 0 1 0 X
1 0 1 1 X
- Better to group 1s or 0s?
1 1 0 0 X 1 1 0 1 X 1 1 1 0 X 1 1 1 1 X
34Inverter
- Input- output behavior given by table called
truth table - Symbols used in circuits to denote an inverter is
given - Bubble at the end is called the inversion bubble
- Forms a basic function in Boolean algebra and
circuits
35NAND GATES
- Symbol above is for NAND
- A, B input, X output
- Notice the inversion bubble just before the input
- Output is 0 iff both inputs are 1
- Output is 1 if at least one input 0
- Will see NAND is NotAND
36AND Gates
- Has corresponding electronic circuit
- A,B inputs, X output
- Output 1 iff both inputs 1
- Output 0 iff either input 1
- Notice diagram is NAND without the inversion
bubble - NAND NOTAND
37OR Gates
- Two inputs A,B,
- one output X
- X is 1 iff either of A, B is 1
- X is 0 if both A, B are 0
- Symbol on top
- Truth Table on bottom
- Note No inversion bubble
38Nor Gates
- Symbol on top
- Truth table on bottom
- Notice inversion bubble in front of OR symbol
- Get output value by switching the value coming
out of OR gates
39Boolean Algebra
- Boolean Algebra A function has only two outcomes
(1true), (o-false) - N variable boolean function can be described has
only 2N possible outputs. They can be written
as a table - If agree on order of listing argument
combinations such as base 2 , can write output as
2n bit binary number
40Example Majority Function
- Three inputs A, B, C
- One output M
- Output takes truth value of majority inputs. I.e.
- M is 1 iff two of A,B,C is 1
- M is 0 iff two of A, B, C is 0
- Notice writing large truth tables is cumbersome
41Alternative Representation
- Collect the combinations of variable that give 1
for output. - Write the function as a SUM of these terms
- In terms, write variable name for value 1, and a
bar over the name for 0. - EG M ABCABCABCABC
42Rationale for New Notation
- Consider ABC The product is for AND
- Consider ABCABC The sum is for OR
- So we are writing the function as a sum of
products - I.e. AND-ing OR-terms Called conjunctive normal
form. - Consider ABC This is 1 iff A0, B1 and C1
- A function of N variables can be given as sum of
2N n-variable products
43Creating Circuits for Boolean Functions
- MABCABCABCABC
- 1,2,3 are NOT gates feeding lines A,B,C
- 4,5,6,7 are AND gates corresponding to the four
product terms - 8 is an OR term corresponding to the sum
- A,B,C have been inserted to avoid clutter they
could be connected directly out of NOT gate
44Implementing Boolean Functions
- Write the truth table
- Provide inverters for complementing inputs
- Draw an AND gate for each term with 1in output
column - Wire the AND gates to appropriate inputs
- Feed the outputs of all AND gates into an OR gate
45Using A Single Gate Type
- It is desirable to use only one type of gate
generate the whole circuit. - Can use NAND or NOR gate.
- In order to do so, enough to show that
- NOT, AND, OR NAND can be generated by NOR gates
- NOT, AND, OR, NOR ca be generated by NAND gates.
- We say that NAND, NOR are complete for Boolean
circuits
46Completeness of NAND
47Completeness of NOR
48Circuit Equivalence
- Sometimes need to minimize number of elements on
a board - get minimum number of gates
- Two input gates instead of four input gates
- Need to find an equivalent circuit for the given
circuit - Equivalent having same input output behavior
computing same Boolean function - Use Boolean Algebra
49Example Using ABAC A(BC)
50Some Laws of Boolean Algebra
51Consequences of De Morgans Law
52Using De Morgans Laws to covert sum of products
to NAND
53De Morgan again
- A NAND gate
- Y A.B A B
- is the same as an OR gate with two NOT gates
- Similarly a NOR gate is the same as an AND gate
with two inverters - Y A B A.B
- not the individual terms
- change the sign
- not the lot
54Dual gates
not the individual inputs change the gate not the
output
55Truth Tables and Boolean Notation
- NAND Gate Representation
- It is possible to implement any boolean
expression using only NAND gates
NOT
X
X
AND
A.B
A
A.B
B
OR
A
AB
B
56Truth Tables and Boolean Notation
- NAND Gate representation
- Implement the following circuit using only NAND
gates
x2
x4
x3
De Morgan can also be represented visually
57(No Transcript)
58Exercise
- Implement NOT, AND and OR using NOR gates
- Example AND gate dual
circuit
59Solution
- Similar pattern to using NAND gates (not
surprising) - NOT
- AND
- OR
X
X
A.B
A
A
A.B
B
A.B
B
A
AB
A.B
A
AB
B
B
60Truth Tables and Boolean Notation
- NOR Gate representation
- It is also possible to implement any boolean
expression using only NOR gates - Implement the following circuit using only NOR
gates
X4
X3
X
2
61Solution
- Two NOR gates in sequence acting as NOTs can be
eliminated
X4
X3
X
2
62Examples
- The half adder
- The half adder is a circuit for adding two single
bit numbers - Develop a truth table and Boolean expressions for
the half adder
A B S C
0 0
0 1
1 0
1 1
S and C are the Sum and Carry
63Half adder
- The sum is XOR operation and the carry an AND
C
A
A B S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
B
S
64Examples
- The full adder
- Develop a truth table and Boolean expressions for
the full adder, this circuit also includes a
carry in.
Sum
A
full adder
B
Cout
Cin
65Truth table for full adder
Exercise Complete the Karnaugh maps for the Sum
and the Carry out columns
Cin A B S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
66Full adder circuit
A
B
Sum
Cout
Cin
Sum Cin xor A xor B
Cout A.B A.Cin B.Cin
67(No Transcript)
68Karnaugh Map Method of Multiplexer Implementation
Consider the function
A is taken to be the data variable and B,C to be
the select variables.
69Example of MUX combo circuit
70(No Transcript)