Central Oregon Community College

1
IRQs, DMAs and I/O Addresses

• Central Oregon Community College
• Kelvin Kempfer
• CIS 145
• Microcomputer Servicing

2
Outline

• IRQ
• DMA
• I/O Addresses

3
IRQs

• How can the outside get the attention of the
  microprocessor?

Programmed I/O the micro processor alerts the
designated peripheral by applying its I/O address
to the systems address bus
Polling microprocessor examines the status of
the peripheral under program control
Strobe (STB)
Acknowledge (ACK)
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IRQs

• What is the problem with polling?

What if I would stop every 5 minutes to see if
each and everyone of my students had an
understanding of the material?
What other process could we use to save time?
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IRQs
6
IRQs

• Interrupt Request
• Physical connections between external hardware
  devices and the interrupt controllers.

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IRQs

• Started with the original IBM XT systems.
• These interruptions to the CPU are called
  hardware interrupts and the device handles them
  by placing a voltage on a designated line.
• Intel developed the 8259 called the interrupt
  controller chip
• The chip had a direct line to the CPU and
  signaled the CPU when an IRQ was activated.

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IRQs

• The magnificent 8
• IRQ 0 System Timer
• IRQ 1 Keyboard Controller
• IRQ 2 Reserved
• IRQ 3 COM2
• IRQ 4 COM1
• IRQ 5 LPT2
• IRQ 6 FDD Controller
• IRQ 7 LPT1

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IRQs
The Original IBM 8-bit Socket
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IRQs

• With the development of the AT system came the
  additional IRQS.

Remember the reserved IRQ2?
Another 8259 was added to provide the additional
IRQS.
In short, IRQ9 was tied into IRQ2.
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IRQs

• The additional 8
• IRQ 8 Real Time Clock
• IRQ 9 Available (as IRQ2 or IRQ9)
• IRQ 10 Available
• IRQ 11 Available
• IRQ 12 PS/2 Mouse
• IRQ 13 Math Coprocessor
• IRQ 14 Primary IDE
• IRQ 15 Secondary IDE

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IRQs
ISA
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IRQs

• The PCI bus allows interrupt sharing.
• All PCI cards are set to PCI interrupt A and
  share that interrupt on the PCI bus.
• We now have two sets of interrupts
• PCI interrupts
• ISA interrupts

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IRQs

• PCI IRQ Steering is the solution to the interrupt
  sharing problem for PCI cards.
• PCI IRQ Steering allows a plug-and-play operating
  system to dynamically map or steer PCI cards to
  ISA interrupts and allows several PCI cards to be
  mapped to the same ISA interrupt.

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I/O Addresses

• Also known as I/O Port Addresses or simply called
  Ports.
• Numbers that the CPU can use to access hardware
  devices.

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DMAs

• Direct Memory Access
• A shortcut method whereby an I/O device can send
  data directly to memory, bypassing the CPU.
• A chip on the system board contains the DMA logic
  and manages the process.

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DMAs

• Direct Memory Access channels are used by
  high-speed communications devices that must send
  and receive information at high speed.

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DMAs

• DMA Controller
• Peripheral sends DMA request (DREQ) to DMA
  controller.
• DMA controller sends HOLD to microprocessor.
• Microprocessor sends busses available (BA)/hold
  acknowledge (HLDA) to DMA controller.
• DMA controller sends DACK (DMA acknowledge) to
  microprocessor.

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DMAs

• Two ways of transferring data
• HALT (Burst Mode DMA)
• No operation (NOP) instructions to the
  microprocessor
• Cycle Stealing Mode
• Watches the microprocessor while it is doing
  internal processing
• DMA steals clock cycles

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DMAs

• Single cycle stealing
• Microprocessor is halted for a single clock cycle
• Full cycle stealing
• DMA controller can see the busses any time the
  microprocessor is not using them

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DMAs

• There are currently 7 DMA channels.
• 8-bit technology started with 4
• 16-bit technology cascaded a second DMA
  controller chip to gain an additional 3.
• Slower devices such as floppy drives, sound cards
  and tape drives may still use DMA channels.
• DMA is a slow process and not as popular as they
  once were.

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DMAs

• DMA 8-bit 16-bit
• 0 Dynamic RAM Refresh Available
• 1 Available Available
• 2 FDD Controller FDD Controller
• 3 HDD Controller Available
• 4 1st DMA controller Cascade
• 5 7 Available

PCI adapters dont use these ISA DMA channels.
Their use is only for ISA cards.