Dynamically Reconfigurable Architectures: An Overview

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Dynamically Reconfigurable Architectures An
Overview

• Juanjo Noguera
• Dept. Computer Architecture (DAC-UPC)
• jnoguera_at_ac.upc.es

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Outline

• Introduction
• Reconfigurable Computing
• Reconfigurable devices and systems
• Reconfigurable Systems Classification
• Reconfiguration Methods
• Reconfigurable Instruction Set Processors
• ASIP-based approach
• Coprocessor-based approach
• Conclusions

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Introduction

• Reconfigurable Computing (RC) is an emerging
  paradigm for digital systems design
• Technology improvements have made possible new
  programmable logic devices (FPGAs, CPLDs)
• Objective of the talk Give an overview of RC
  concepts and introduce the Reconfigurable
  Instruction Set Processors.

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Introduction (II)

• RC objectives Specialization, performance,
  flexibility
• Basic idea Programmable Hardware

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Introduction (III)

• RC comparison versus other alternatives

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Outline

• Introduction
• Reconfigurable Computing
• Reconfigurable devices and systems
• Reconfigurable Systems Classification
• Reconfiguration Methods
• Reconfigurable Instruction Set Processors
• ASIP-based approach
• Coprocessor-based approach
• Conclusions

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Reconfigurable Devices

• General device architecture

Reconfigurable Computing
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Reconfigurable Devices (II)

• Routing strategies

Reconfigurable Computing
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Reconfigurable Devices (III)

• SRAM based devices with infinite number of
  reconfigurations

Configuration Bitstream110011101 ...
Reconfigurable Computing
Reconfigurable Device
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Reconfigurable Systems (I)

• Rapid System (ASIC) Prototyping

PLD
PLD
PLD
CPU
PLD
Reconfigurable Computing
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Reconfigurable Systems (II)

• Reconfigurable Systems Classification

Host Computer
PLD
(d)
CPU
Reconfigurable Computing
RAM
(c)
PLD
SYSTEM BUS
PLD
RAM
I/O
PLD
(b)
RAM
(a)
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Reconfiguration Methods (I)

• Compile Time Reconfiguration (CTR)
• Device configuration is fixed during application
  run time execution
• Run Time Reconfiguration (RTR)
• Device configuration changes during application
  run time execution
• RTR strategies
• Global RTR
• Partial RTR

Reconfigurable Computing
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Reconfiguration Methods (II)

• Global Run Time Reconfiguration (Single context)

Application
1
2
Reconfigurable Computing
3
4
Reconfiguration Contexts
1
Dynamically Reconfigurable Device
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Reconfiguration Methods (III)

• Partial Run Time Reconfiguration (Multiple
  context)

Aplicació
1
2
Reconfigurable Computing
3
4
4
1
Reconfiguration Contexts
3
Dynamically Reconfigurable Device
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Reconfiguration Methods (IV)

• Run-Time Reconfiguration Challenges
• Temporal Partitioning
• Context Scheduling (static)
• Reconfiguration Latency Overhead
• Configuration Pre-fetching
• Configuration Caching
• Configuration Compression

Reconfigurable Computing
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Outline

• Introduction
• Reconfigurable Computing
• Reconfigurable devices and systems
• Reconfigurable Systems Classification
• Reconfiguration Methods
• Reconfigurable Instruction Set Processors
• ASIP-based approach
• Coprocessor-based approach
• Conclusions

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Introduction

• By including reconfigurability we can increase
  flexibility with high specialization

Reconfigurable Instruction Set Processors
Processor
PLD
Reconfigurable Processor
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Introduction (II)

• Coprocessor based approach
• ASIP based approach

Reconfigurable Instruction Set Processors
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Coprocessor based approach (I)

• Typical example CPU PCI board
• Altera ARC-PCI
• Compaq Pamette
• System on Chip (SoC)
• Alteras Excalibur device
• Chameleon Systems, Inc.

Reconfigurable Instruction Set Processors
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Coprocessor based approach (II)

• Altera ARC-PCI

Reconfigurable Instruction Set Processors
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Coprocessor based approach (III)

• Compaq Pamette

Reconfigurable Instruction Set Processors
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Coprocessor based approach (IV)

• Alteras Excalibur device
• Embedded Processor ARM, MIPS or NIOS

Reconfigurable Instruction Set Processors
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Coprocessor based approach (V)

• Chameleon Systems, Inc.

Reconfigurable Instruction Set Processors
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ASIP based approach (I)

• Reconfigurable unit within CPU

Reconfigurable Instruction Set Processors
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ASIP based approach (II)

• Challenge CAD tools

Reconfigurable Instruction Set Processors
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ASIP based approach (III)
Reconfigurable Instruction Set Processors
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ASIP based approach (II)

• Example Philips CinCISe Architecture

Reconfigurable Instruction Set Processors
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ASIP based approach (III)

• Application example DES A5 encryptation
  algorithms

Reconfigurable Instruction Set Processors
srl 13, 2, 20 andi 25, 13, 1 srl
14, 2, 21 andi 24, 14, 6 or
15, 25, 24 srl 13, 2, 22 andi
14, 13, 56 or 25, 15, 14 sll
24, 25, 2
srl 24, 5, 18 srl 25, 5,
17 xor 8, 24, 25 srl 9, 5,
16 xor 10, 8, 9 srl 11, 5,
13 xor 12, 10, 11 andi 13, 12, 1
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Conclusions

• Reconfigurable Computing is an emerging and
  interesting computing paradigm
• RC devices and architectures are becoming a
  reality
• There is a big challenge is High-level synthesis
  (CAD) tools

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Conclusions (II)

• What is the future ??

Flexibility, Power
RC
GPP
RC
Performance