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Chapter 4 The von Neumann Model

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Title: Chapter 4 The von Neumann Model


1
Chapter 4 The von Neumann Model
2
Digital Logic Hierarchy
FA
Mem
Now Begins Software
3
The Von Neumann Computer
INPUT Keyboard Mouse Scanner Card
reader Disk
John von Neumannproposed this model in 1946
Program instructions and data are both stored as
sequences of bits in a single shared memory
4
Memory Interface
  • Memory address register (MAR)
  • Holds the memory address for the location that is
    to be read or written
  • Memory data register (MDR)
  • Holds the data that is read from memory
  • Holds the data this is to be written to memory
  • Memory write enable (WE)
  • The control signal that is asserted to write to
    memory

5
Using the Memory Block
  • To read from memory
  • Put the address from which you want to read into
    the MAR
  • The memory then automatically reads that
    locations data into the MDR
  • Read the data from the MDR
  • To write to memory
  • Put the address to which you want to write to
    into the MAR
  • Put the data you want to write into the MDR
  • Assert the WE signal

6
Memory Terminology
  • Address space Amount of data that can be stored
    (also called the memory size)
  • Addressability Number of bits stored in each
    memory location
  • 1 byte 8 bits
  • 1 kilobyte (KB) 210 bytes 1,024 bytes
  • 1 megabyte (MB) 220 bytes
  • 1 gigabyte (GB) 230 bytes

7
The Processing Unit
  • Arithmetic and logic unit (ALU)
  • ADD, SUB, MULT, etc.
  • AND, OR, NOT, etc.
  • The word length of a computer is the number of
    bits that the ALU can process
  • Includes a small amount of memory very close to
    the ALU, often called a register file

INPUT
OUTPUT
Processing Unit
ALU
TEMP
Control Unit
PC
IR
8
Input and Output
  • Used to get information into and out of the
    computer
  • External devices attached to a computer are
    called peripherals

INPUT Keyboard Mouse Scanner Card
reader Disk
OUTPUT Monitor Printer LED Disk
Processing Unit
ALU
TEMP
Control Unit
PC
IR
9
Control Unit
  • The control unit directs execution of the program
  • Keeps track of where we are in the execution of
    the current program
  • Program counter (PC) gives address for next
    instruction to be executed
  • Also keeps track of where we are in the execution
    of the current instruction
  • Instruction register (IR) contains the currently
    executing instruction
  • Large finite state machine

INPUT
OUTPUT
Processing Unit
ALU
TEMP
Control Unit
PC
IR
10
The LC-3 An Example von Neumann Machine
  • Memory
  • Processing Unit

PC
  • Control

IR
11
Anatomy of an Instruction ADD R6, R2, R6
16-bit instruction format.4-bit opcodes mean
there are at most 24 different instruction types.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
1
1
1
0
0
1
0
0
0
0
1
1
0
unused
R6 R6 R2
  • This is an operate instruction
  • Not all bits have meaning in this particular
    instruction.

12
The Instruction Cycle
  • FETCH
  • Obtain the next instruction from memory
  • DECODE
  • Examine the instruction, and determine how to
    execute it
  • EVALUATE ADDRESS
  • Compute the address of any needed memory location
    (put in MAR)
  • FETCH OPERANDS
  • Obtain the source operands needed for execution
  • EXECUTE
  • Carry out the operation of the instruction
  • STORE RESULT
  • Store the result in the designated destination

Not all instructions require all six phases
13
The Fetch Phase
  • Computer programs consist of instructions
  • Each instruction is typically 1 machine word wide
  • For example, LC-3 instructions are 16 bits
  • Instructions are stored in memory
  • Program ? sequence of instructions
  • Stored in memory as 1s and 0s
  • Called machine code

14
Fetching an Instruction
  • Copy PC contents into MAR, and increment PC


PC
  • Wait for memory access
  • Result will be placed into MDR by memory unit

  • Copy MDR contents to IR

IR
?
15
Decode
  • Pick apart the instruction stored in the IR
  • Control logic in control unit does this
  • Determine
  • Operation
  • Operand sources
  • Operand destination

16
Fetch Operands
ADD R6,R2,R6
  • Get sourceregister numbers (SR1 and SR2)from IR

PC
  • Send SR1and SR2 to register fileas addresses

010
110
?
  • Retrieve valuesaddressed bySR1 and SR2and send
    to ALU


IR
17
Execute
ADD R6,R2,R6
  • Control unittells ALU which operation to do,
    based on IR
  • The ALU doesits operation

PC
IR
18
Store Result
ADD R6,R2,R6
  • Get destinationregister number(DR) from IR

?
  • Send DR to registerfile

PC
110
  • Store ALU resultinto register file
  • at location pointedto by DR
  • Control unit generatessignal that tells
    register
  • file when to load


IR
19
Anatomy of an Instruction LDR R2, R3, 6
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
1
0
0
1
0
0
1
1
0
0
0
1
1
0
EffectiveAddress R3 6 R2
MemEffectiveAddress
  • This is a data movement instruction
  • This requires the computation of an effective
    memory address
  • For LDR, it is of the form base offset (e.g.,
    R3 6)

20
Decode
LDR R2,R3,6
  • Get sourceregister number (SR1) from IR

PC
  • Send SR1 to register fileas an address

011


IR
21
Evaluate Address
LDR R2,R3,6
  • Retrieve valueaddressed bySR1 and
    theimmediate, thensend to addressadder

PC
  • Add the contents of base register (R3) to
    theoffset (6)
  • Put effective address in MAR

?
IR
22
Fetch Operands
LDR R2,R3,6
  • Read memory
  • Put data from memory in MDR

?
23
Store Result
LDR R2,R3,6
  • Get destinationregister number(DR) from IR

?
  • Send DR to registerfile

PC
010
  • Store MDR result into
  • Control unit generatessignal that tells
    register
  • file when to load


IR
24
Anatomy of an Instruction JMP R3
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
1
0
0
0
0
0
0
1
1
0
0
0
0
0
0
unused
unused
PC R3
This is a control instruction. It changes the
execution path of the CPU.
25
Fetch Operands
JMP R3
  • Get sourceregister number (SR1) from IR

PC
  • Send SR1 to register fileas an address

011
  • Retrieve valueaddressed bySR1 and sendto ALU

?

IR
26
Execute
JMP R3
  • The ALU doesits operationControl unittells it
    whichoperation to do

PC
IR
27
Store Result
JMP R3
  • Store ALU resultinto PCControl unit
    generatessignal that tells the PC when to do
    the load

?
PC
IR
28
Von Neumann Summary
  • Programs are stored in memory as instructions
  • Our LC-3 machine has 16-bit instructions
  • Data is also stored in the same memory
  • A program is executed by
  • Fetching next instruction from memory
  • Decoding it
  • Evaluating its address
  • Fetching its operands
  • Doing the requested operation and
  • Storing the result

29
The Von Neumann Bottleneck
  • You may hear of the termVon Neumann Bottleneck
  • All instructions have to be fetched from memory
  • the path to memory is a bottleneck
  • In spite of this, the Von Neumann model is the
    computing model that is used

30
Stopping the Clock
  • Control unit will repeat instruction processing
    sequenceas long as clock is running.
  • If not processing instructions from your
    application,then it is processing instructions
    from the Operating System (OS).
  • The OS is a special program
  • that manages processorand other resources.
  • To stop the computer
  • AND the clock generator signal with ZERO
  • When control unit stops seeing the CLOCK signal,
    it stops processing.
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