Chapter 4 The Von Neumann Model

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Chapter 4 The Von Neumann Model
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Pitfalls of Computer Technology Forecasting
I think there is a world market for maybe five
computers. Thomas Watson, IBM Chairman,
1943 Computers in the future may weigh no more
than 1.5 tons. Popular Mechanics, 1949 There
is no reason anyone would want a computer in
their home. Ken Olsen, DEC founder, 1977 DOS
addresses only 1 MB of RAM because we cannot
imagine any applications needing more.
Microsoft, 1980 The 32-bit machine would be an
overkill for a personal computer. Sol Libes,
ByteLines, 1981 640K ought to be enough for
anybody. Bill Gates, 1981
 
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Chapter 4

• Computer Architecture
• Von Neumann vs. Harvard
• RISC / CISC
• MSP430
• Anatomy of an Instruction
• Instruction Cycles
• Clocks
• Finite State Machine

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The Von Neumann Computer
Memory
Von Neumannproposed this model in 1946
Datapath
Control
The Von Neumann modelProgram instructions and
Data are both stored as sequencesof bits in
computer memory
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Memory Terminology

• Address Space amount of data that can be stored
  (also called the memory size)
• Addressability number of bits stored in each
  memory location
• 1 byte 8 bits
• 1 Kilobyte (Kbyte) 210 bytes 1024 bytes
• 1 Megabyte (Mbyte) 220 bytes
• 1 Gigabyte (Gbyte) 230 bytes
• 1 Terabyte (Tbyte) 240 bytes

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Memory Interface

• The Memory Address Register (MAR) stores the
  memory address for the Address Bus
• The Memory Select (MSEL) connects memory to the
  Data Bus
• The Memory Write Enable (MWE) is a control signal
  that is asserted when writing to memory
• Memory Address Bus (Where?)
• Memory Data Bus (What?)

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MSP430 Architecture
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MSP430 Memory Model
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The Processing Unit

• Performs the arithmetic and logical operations
• ALU Arithmetic and Logic Unit
• Arithmetic operations add, subtract, compare
• Logical operations and, xor, bit
• Sets condition codes
• The word length of a computer is the number of
  bits processed by the ALU.
• Includes a small amount of very fast memory close
  to the ALU (operand registers, register file).

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Input and Output

• Used to get information in and out of the
  computer.
• External devices attached to a computer are
  called peripherals.

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Control

• The control unit directs the execution of the
  program
• It keeps track of
• Where we are in the process of executing the
  program
• The program counter or PC points to the next
  instruction to be executed
• Where we are in the process of executing the
  current
• The instruction register or IR contains the
  currently executing instruction
• Prevents bus conflicts, timing problems
• Finite State Machine driven by a clock

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The MSP430
A Von Neumann Machine
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RISC / CISC Instruction Set
RISC
CISC

• Emphasis on software
• Single-clock
• Reduced instructions
• Low cycles/second
• Large code sizes
• More transistors on memory registers
• Pipelining friendly

• Emphasis on hardware
• Multi-clock
• Complex instructions
• Small code sizes
• High cycles/second
• More transistors for complex instructions
• Compiler friendly

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MSP430 RISC/CISC Instruction Set
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Anatomy of an Instruction

• Opcode
• What the instruction does - Operator
• Source Operand
• 1st data object manipulated by the instruction
• Destination Operand
• 2nd data object manipulated by the instruction
• Where results of operation is stored.
• Addressing Modes

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3 Instruction Formats
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Double Operand Instructions
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Single Operand Instruction
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Jump Instructions
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Addressing Modes
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The Instruction Cycle

• INSTRUCTION FETCH
• Obtain the next instruction from memory
• DECODE
• Examine the instruction, and determine how to
  execute it
• SOURCE OPERAND FETCH
• Load source operand
• DESTINATION OPERAND FETCH
• Load destination operand
• EXECUTE
• Carry out the execution of the instruction
• STORE RESULT
• Store the result in the designated destination

Not all instructions require all six phases
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The Instruction Fetch Phase

• Computer programs consist of sequence of
  instructions
• each instruction 1-3 Binary Words
• stored in memory as 1s and 0s
• called machine code.
• Instructions are fetched from memory using the
  program counter (PC) as the address of the memory
  location.
• Program counter increments for each
  instruction.

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Instruction Decode Phase

• Pick apart the instruction stored in the IR
• control unit in control logic does all this
• Determines
• instruction format
• operation
• operand sources
• operand destination
• Combinational logic (ie. Does not require a clock
  cycle.)

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Source Operand Fetch Phase

• Instruction format defines addressing mode
• Register mode - Rn
• Indexed mode - x(Rn)
• Symbolic mode - addr
• Absolute mode - addr
• Indirect register mode - _at_Rn
• Indirect autoincrement mode - _at_Rn
• Immediate mode - n
• Constant Generator

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Destination Operand Fetch Phase

• Instruction format defines addressing mode
• Register mode - Rn
• Indexed mode - x(Rn)
• Symbolic mode - addr

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Execute Phase

• ALU is combinational logic and does not require a
  clock
• Some instructions are multi-functional and
  require several operations
• PUSH - stack decremented
• RETI - status register restored from stack, stack
  incremented, program counter restored from stack,
  stack incremented
• CALL - stack decremented, program register saved
  on stack.

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Store Phase

• ALU results are stored in register/memory
• Location of destination operand is the target of
  the result of the instruction.

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Clocks

• With a clock cycle, the processor performs an
  action that corresponds to an instruction phase.
• CPI (Cycles Per Instruction) gives a
  representation of the average number of clock
  cycles required for a microprocessor to execute
  an instruction.
• A microprocessor power is characterized by the
  number of instructions per second that it is
  capable of processing.
• MIPS (millions of instructions per second) is the
  unit used and corresponds to the processor
  frequency divided by the cycles per second (CPI).

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Faster Clock ? Shorter Running Time
Faster steps do not necessarily mean shorter
travel time.
 
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Basic Clock System
Basic Clock Moduleprovides the clocks for the
MSP430 devices
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Stopping the Clock

• Control unit will repeat instruction processing
  sequenceas long as clock is running.
• If not processing instructions from your
  application,then it is processing instructions
  from the Operating System (OS).
• The OS is a special program
• that manages processorand other resources.
• To stop the computer
• AND the clock generator signal with ZERO
• When control unit stops seeing the CLOCK signal,
  it stops processing.

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Basic Clock System
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Finite State Machine
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Finite State Machine
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Finite State Machine
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Von Neumann In Review

• Programs are stored in memory as instructions
• instructions are simply collections of 1s and
  0s
• our LC-3 machine has 16-bit instructions
• Data is also stored in memory as 1s and 0s
• A program is executed by
• fetching next instruction from memory
• decoding it
• fetching its operands
• doing the requested operation and
• storing the result

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The Von Neumann Bottleneck

• You may hear of the term Von Neumann Bottleneck
• All instructions have to be fetched from memory
• the path to memory is a bottleneck
• In spite of this, the Von Neumann model is the
  computing model that is used

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Fetching an Instruction
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Source Indexed Mode x(Rs)
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Fetching an Instruction, Clock 2
?
?
?
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Evaluating Destination
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Double Operand Instructions
As - Source Operand Mode
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Op-Code (tells what the instruction is)
Ad - Destination Operand Mode
Rd Destination Register
Rs - Source Register
Word or Byte Operation
add.w
R4
R6
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Single Operand Instructions
As - Source Operand Mode
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Op-Code (tells what the instruction is)
Rs Source Register
Rs - Source Register
Word or Byte Operation
rra.w
R6
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Jump Instructions
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Jmp Op-Code
Op-Code
Jmp Offset
jne
12(PC)
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MSP430 Architecture