MIPS assembly

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MIPS assembly
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Comments on Overflow and Underflow

• Overflow (and underflow also for floating
  numbers) happens when a number is outside the
  range of a particular representation
• For example, by using 8-bit twos complement
  representation, we can only represent a number
  between -128 and 127
• If a number is smaller than -128, it will cause
  overflow
• If a number is larger than 127, it will cause
  overflow also
• Note that arithmetic operations can result in
  overflow

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Stored Program Concept
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Stored Program Concept

• Programs consist of instructions and data
• Instructions are also represented as 0s and 1s
• Before a program runs, it will be loaded and
  stored in memory it can be read and written just
  like numbers
• A program is executed instruction by instruction
• These apply to all kinds of programs, operating
  systems, applications, games, and so on

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GoogleEarth.exe
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Linux Kernel
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Instruction Set Architectures

• An instruction set architecture specifies
• Instructions
• Registers
• Memory access
• Input/output
• An instruction set architecture provides an
  abstraction of the hardware implementation
• The hardware implementation decides what and how
  instructions are implemented

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Stored Program Concept
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Instruction Execution Steps

• Instruction fetch step
• Fetch the instruction from memory and compute the
  address of the next sequential instruction
• Instruction decode and register fetch step
• Decode the instruction and read registers
• Instruction execution
• Memory access
• Write back

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Arithmetic Instruction Execution
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MIPS ISA

• There are many different instruction set
  architectures designed for different applications
  with different performance/cost tradeoff
• Including Intel-32, PowerPC, MIPS, ARM .
• We focus on MIPS architecture
• Microprocessor without Interlocked Pipeline
  Stages
• A RISC (reduced instruction set computer)
  architecture
• In contrast to CISC (complex instruction set
  computer)
• Similar to other architectures developed since
  the 1980's
• Almost 100 million MIPS processors manufactured
  in 2002
• Used by NEC, Nintendo, Cisco, Silicon Graphics,
  Sony,

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Abstract View of MIPS Implementation
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MIPS Instruction Set

• An instruction is a command that hardware
  understands
• Instruction set is the vocabulary of commands
  understood by a given computer
• It includes arithmetic instructions, memory
  access instructions, logical operations,
  instructions for making decisions

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Arithmetic Instructions

• Each MIPS arithmetic instruction performs only
  one operation
• Each one must always have exactly three variables
• add a, b, c a b c
• Note that these variables can be the same though
• If we have a more complex statement, we have to
  break it into pieces

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Arithmetic Instructions

• Example
• f (g h) (i j)

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Arithmetic Instructions

• Example
• f (g h) (i j)
• add t0, g, h temporary variable t0
  contains g h
• add t1, i, j temporary variable t1
  contains i j
• sub f, t0, t1 f gets t0 t1

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Operands of Computer Hardware

• In C, we can define as many as variables as we
  need
• In MIPS, operands for arithmetic operations must
  be from registers
• Note in some architectures (including IA 32),
  some operands can be from memory directly
• MIPS has thirty-two 32-bit registers
• What can we do if we need more variables than the
  number of the registers we have?

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MIPS Registers
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Arithmetic Instructions

• Example
• f (g h) (i j)
• In MIPS, add can not access variables
  directly
• because they are in memory
• Suppose f, g, h, i, and j are in s0, s1,
  s2, s3, s4 respectively
• add t0, s1, s2 temporary variable
  t0 contains g h
• add t1, s3, s4 temporary variable
  t1 contains i j
• sub s0, t0, t1 f gets t0 t1

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Memory Operands

• Since variables (they are data) are initially in
  memory, we need to have data transfer
  instructions
• Note a program (including data (variables)) is
  loaded from memory
• We also need to save the results to memory
• Also when we need more variables than the number
  of registers we have, we need to use memory to
  save the registers that are not used at the
  moment
• Data transfer instructions
• lw (load word) from memory to a register
• st (store word) from register to memory

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Specifying Memory Address

• Memory is organized as an array of bytes (8 bits)

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Specifying Memory Address

• MIPS uses words (4 bytes)
• Each word must start at address that are
  multiples of 4
• This is called alignment restriction
• Big Endian

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Example of Endianness

• Store 0x87654321 at address 0x0000,
  byte-addressable

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Example of Endianness

• Store 0x87654321 at address 0x0000,
  byte-addressable

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Using Load and Store

• Memory address in load and store instructions is
  specified by a base register and offset
• This is called base addressing

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Using Load and Store

• How to implement the following statement using
  the MIPS assembly we have so far?
• Assuming the address of A is in s3 and the
  variable h is in s2
• A12 h A8

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MIPS Assembly Programs

• Consists of MIPS instructions and data
• Instructions are given in .text segments
• A MIPS program can have multiple .text segments
• Data are defined in .data segments using MIPS
  assembly directives
• .word, for example, defines the following numbers
  in successive memory words
• See Appendix A A.10 (pp. A-45 A-48) for details

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First MIPS Assembly Program

• Compute the sum of first five homework assignment
  scores
• The scores are in memory
• We need to
• Load the address to a register
• Load the first two scores
• Add them
• Then load third score and add it to the sum and
  so on

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First MIPS Assembly Program
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Summary

• Stored program concept
• Note that programs are represented using 0s and
  1s as numbers
• An instruction set architecture specifies the
  instructions, registers, and input/output of a
  computer architecture
• Instructions are commands that hardware
  understands
• MIPS ISA
• Two types of MIPS instructions so far
• Arithmetic
• Operands for arithmetic instructions are
  restricted
• Data transfer
• Load from memory to a register
• Store a register to memory

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Constant or Immediate Operands

• Many times we use a constant in an operation
• For example, i, i--, i 4, and so on
• More than half of the MIPS arithmetic
  instructions have a constant as an operand in
  SPEC2000 benchmarks
• Benchmarks are a set of programs specifically
  designed for evaluating and comparing performance
  of different choices
• Using the instructions so far, how can we do i
  4 ?

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Example

• How do we implement i 4?
• Assume that s3 has variable i
• Since add needs three registers, we first need to
  load constant 4 into a register (for example t0)
• Then we have
• add s3, s3, t0
• Performance would not be good because every time
  we need a nonzero constant we have to load it
  from memory

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C/C Example

• Suppose that ptr is defined as
• int ptr
• How do we translate ptr ?

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C/C Example

• Suppose that ptr is defined as
• int ptr
• How do we translate ptr ?
• ptr ptr 4

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Constant Operands

• Design principle Make the common case fast
• Since constant operands occur frequently, we
  should include constants inside arithmetic
  operations so that they are much faster
• MIPS has an add instruction that allows one
  operand to be a constant
• addi s1, s2, 100 s1 s2 100

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Sum of Five Assignment Scores
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Representing Instructions in Computers

• Note that computers only have 0s and 1s
• Before we can load MIPS instructions into memory,
  they need to be translated into machine
  instructions, which consist of only 0s and 1s
• In other words, we need to encode or represent
  instructions
• The symbolic representation of machine
  instructions is called assembly language
• The binary representation of instructions is
  called machine language
• A sequence of instructions in binary form is
  called machine code

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Example
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MIPS Instruction Encoding

• Each MIPS instruction is exactly 32 bits
• R-type (register type)
• I-type (immediate type)
• J-type (jump type)

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MIPS Instruction Encoding
Instruction Format Op rs rt rd shamt funct address
add R 0 reg reg reg 0 32ten n.a.
sub (subtract) R 0 reg reg reg 0 34ten n.a.
add immediate I 8ten reg reg n.a. n.a. n.a. constant
lw (load word) I 35ten reg reg n.a. n.a. n.a. address
sw (store word) I 43ten reg reg n.a. n.a. n.a address
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R-Type Encoding
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R-Type Encoding
31
26
25
21
20
16
15
11
10
6
5
0
opcode
rs
rt
rd
shamt
funct
31
21
15
11
26
25
20
16
10
6
5
0
opcode
rs
rt
rd
shamt
funct
Encoding
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R-Type Encoding
31
26
25
21
20
16
15
11
10
6
5
0
opcode
rs
rt
rd
shamt
funct
21
15
11
31
26
25
20
16
10
6
5
0
0
0
0
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
opcode
rs
rt
rd
shamt
funct
0
0
0
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
Encoding 0x01098022
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I-type Encoding
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I-type Encoding
31
26
25
21
20
16
15
0
opcode
rs
rt
Immediate Value
rt
Immediate
sw 5, 3000(2)
rs
31
26
25
16
15
21
20
0
opcode
rs
rt
Immediate Value
Encoding
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I-type Encoding
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I-type Encoding
31
26
25
21
20
16
15
0
opcode
rs
rt
Immediate Value
rt
Immediate
addi s0, s0, 95
rs
31
26
25
16
15
21
20
0
opcode
rs
rt
Immediate Value
Encoding
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I-type Encoding
31
26
25
21
20
16
15
0
opcode
rs
rt
Immediate Value
rt
Immediate
addi s0, s0, 95
rs
31
26
25
21
20
16
15
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
1
1
0
0
opcode
rs
rt
Immediate Value
1
0
0
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
1
1
0
0
Encoding 0x2210005F
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Translating Our First Program
Op rs rt address
35ten 19ten 8ten 1200ten
100011two 10011two 01000two 0000000000000100two
Op rs rt rd shamt funct
0ten 16ten 8ten 16ten 0ten 32ten
000000two 10000two 01000two 10000two 00000two 100000two
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Program in Machine Language

• In SPIM, it can be done by using .word in .text
  segments

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Assembler and Disassembler

• A program that translates instructions in
  assemble language to machine language is an
  assembler
• One of the jobs is to encode instructions
• Another one is to figure the addresses for
  various labels (will cover more later)
• SPIM is an assembler for MIPS assembly
• Sometimes we may have to read programs in machine
  language
• It is very helpful if we can translate the
  instructions back to assembly language

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Example
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Disassembled Assembly
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Disassembler for MIPS

• First we need to find out the op code in an
  instruction
• Based on the op code, we can determine the format
  (R-type, I-type, and J-type)
• R-type
• We need to find out the function code
• We can decode the registers and instruction name
  (mnemonic) (Fig. 2.25, p. 103)
• I-type and J-type
• Based on the op code, we can decode the
  instruction name and other fields accordingly
  (Fig. 2.25, p. 103)

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R-Type Decoding
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I-type Decoding
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MIPS Disassembler Program (C/C)
Note that these data structures work properly
only on linprog
http//www.cs.fsu.edu/liux/courses/cda3100/inclas
sexamples/disassem.c http//www.cs.fsu.edu/liux/
courses/cda3100/inclassexamples/disassem.cpp
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MIPS Disassembler Program (C)
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MIPS Disassembler Program (C)
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MIPS Disassembler Program (C)
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Limited Support for I-type Instructions
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Summary

• Instructions are commands that hardware
  understands
• Instructions are encoded using 0s and 1s
• This format is called machine language
• A sequence of instructions in this format is
  called machine code
• We can program in machine language directly
• That will be very painful and unproductive
• A more efficient way is to program using assembly
• We need to use an assembler to translate assembly
  programs into machine code
• Sometimes a disassembler may be useful

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• http//pages.cs.wisc.edu/larus/spim.html