Title: Analog to Digital
1Analog to Digital Conversion and Digital
Instrument
2A generic ADC-based measurement system
Reference Electronic Instrument Handbook
(Figure 6.1)
3What is an analog-to-digital converter ?
4Terminology
Sample Rate
Resolution
Reference Electronic Instrument Handbook
(Figure 6.3)
5Terminology
Converter Time
After a start command is received by an ADC, it
requires a finite time, called conversion time
tc, before the converter can provide valid output
data. Input voltage change during the conversion
process introduces an undesirable uncertainty in
the generated output.
The full conversion accuracy is realized only if
this uncertainty is kept below the converters
resolution. Thus for an n-bit converter having a
conversion time tc,
6What is an analog-to-digital converter ?
7Dual Slope Architecture
NUP the fixed number of clock periods
used in the up slope Ndn the number
of clock periods required to
return the integrator output to zero
Potential Error Sources Errors in Vref
will affect the gain accuracy of the ADC.
Offset errors can enter if the voltage at the
start of the up slope is different from the
voltage at the end of down slope. Linearity
of the converter can be affected by memory
effects in the integrator capacitor
8Dual Slope ADC
Reference Elements of Electronic
Instrumentation and Measurement
9Multislope Architecture
Reduce conversion time
Fixed Time
Increase resolution
10Flash ADC
Real-Time Sample Rate
Flash converters are very fast, since the speed
of clocked comparators and logic can be quite high
Disadvantages
The complexity of the circuits grows rapidly as
resolution is increased. The power, input
capacitance, clock capacitance, and physical
extent of the comparator array on the integrated
circuit all increase directly with the number of
comparator
Dynamic Errors
A common dynamic error is that due to the large
nonlinear input capacitance of the ADC. This
capacitance is nonlinear since it consists
largely of semiconductor junctions. When this
input capacitance is driven from a finite
impedance source, distortion can occur at high
frequencies
If the input and clock signal are not delivered
simultaneously to all the comparators in the ADC.
Reference http//www.maxim-ic.com/appnotes.cfm/a
ppnote_number/810
11Sample and Hold
are used when input changes are fast compared to
the conversion time of the converter. are also
needed in multichannel systems to hold a sample
from one channel for conversion while the
multiplexer proceeds to sample the next one. are
sometimes used to capture input signal transients
or when two of more signals need to be sampled at
precise the same instant (simultaneous sampling).
Sample Hold
After S1 opens a settling time must elapse
before the S/H output stabilizes to a steady
value and can be used for conversion. However,
when stabilized it does not remain constant but
decays or droops with time. Also, parasitic
capacitance can cause any large input signal
changes to appear at the S/H output in an
attenuated form. This phenomenon is called hold
feedthrough.
Low Value Capacitor
Analog switch S1 closes when the SAMPLE command
is received.
Capacitor Ch begins to charge up (or down) to the
level of the input signal. After a certain delay
called the acquisition time the capacitor
voltage reaches and stays within a specified
error band about the input signal.
A HOLD command causes switch S1 to open but it
does so after a short time interval called
aperture time delay. Aperture time (ta) is
typically a few tens of ns.
12Sample and Hold
Flash ADC
13Binary weight resistor ladder DAC
14R-2R resistor ladder DAC
WHY ?
15Servo ADC or Binary Counter or Ramp ADC
5
1
Conversion Time
7
End-Of-Conversion
Conversion Time ?
1
3
7
16Successive Approximation (SA) ADC
1
2
3
Faster than Servo ADC
1
3
2
Reference Elements of Electronic
Instrumentation and Measurement
172 Step ADC
6 Bits
6 Bits
12 Bits
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
Vx-Vy
Ve
Vx
64xVe
Reference Electronic Instrument Handbook,
COOMBS, p.6.17, figure 6.17
18Multislope ADC
Reference Electronic Instrument Handbook,
COOMBS, p.6.17, figure 6.18
19Pineline ADC
Reference Electronic Instrument Handbook,
COOMBS, p.6.18, figure 6.19