Instruction Set Architecture (ISA) Chapter 2

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Instruction Set Architecture (ISA)Chapter 2
software
instruction set
hardware
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Interface Design

• A good interface
• Lasts through many implementations (portability,
  compatibility)
• Is used in many different ways (generality)
• Provides convenient functionality to higher
  levels
• Permits an efficient implementation at lower
  levels

use
time
imp 1
Interface
use
imp 2
use
imp 3
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Instructions
?1998 Morgan Kaufmann Publishers

• Language of the machine -- machine code
• More primitive than higher level languages (e.G.,
  No sophisticated control flow)
• Very restrictive (e.G., MIPS arithmetic
  instructions)
• Textbook uses dlx (mips) instruction set
  architecture
• Similar to other architectures developed since
  the 1980's
• Used by NEC, Nintendo, silicon graphics, Sony
• Design goals maximize performance and minimize
  cost, reduce design time

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ISA

• Each instruction is executed by the hardware
• How is an instruction represented?
• By a binary format (bytes words, etc)
• Fixed - each instruction is a fixed number of
  bits
• Or variable (multiple word instructions)

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Operands

• Operation is identified by an opcode
• Operands 0,1,2,or 3 required
• Implicit - opcode indicates where the operand is
  located
• Explicit - operand is in a field of the
  instruction
• Registers vs memory

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dlx Arithmetic

• All instructions have 3 operands
• Operand order is fixed (destination
  first) example C code A B C dlx
  code add r0, r1, r2 (associated with
  variables by compiler)

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dlx Arithmetic

• C code A B C D E F - Adlx code
• add r0, r1, r2
• add r0, r0, r3
• sub r4, r5, r0
• Operands must be registers, only 32 registers
  provided Register0 always contains 0
• assume r1 B, r2 C r3 D r5 E

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Registers Vs. Memory

• Arithmetic instructions operands must be
  registers, only 32 registers provided
• Compiler associates variables with registers
• What about programs with lots of variables

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Memory Organization

• Viewed as a large, single-dimension array, with
  an address.
• A memory address is an index into the array.
• "Byte addressing" means that the index points to
  a byte of memory.

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Memory Organization

• Bytes are nice, but most data items use larger
  "words"
• For dlx, a word is 32 bits or 4 byte232 bytes
  with byte addresses from 0 to 232-1
• 230 words with byte addresses 0, 4, 8, ... 232-4
• Words are aligned i.e., What are the least 2
  significant bits of a word address?

Registers hold 32 bits of data
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Stored Program Concept

• Instructions are bits
• Programs are stored in memory to be read or
  written just like datafetch execute
  cycle
• Instructions are fetched and put into a special
  register
• Bits in the register "control" the subsequent
  actions
• Fetch the next instruction and continue

memory for data, programs, compilers, editors,
etc.
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Instructions

• Load and store instructions
• Example C code A8 h A8 dlx
  code lw r0, 32(r3) add r0, r2,r0 sw 32(R3)
  r0
• Remember arithmetic operands are registers, not
  memory!

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Representing Instructions (R type)

• Add r1,r2,r3
• opcode 6
• rs1 5
• rs2 5
• rd 5
• funct 11

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Machine Language

• Instructions, like registers and words of data,
  are also 32 bits long
• Example add r8, r17,r18
• Instruction format 000000
  10001 10010 01000 00000100000 op rs1 rs2
  rd func

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DlX
Register-Register
5
6
10
11
31
26
0
15
16
20
21
25
Op
Rs1
Rs2
Rd
FUNC
Register-Immediate
31
26
0
15
16
20
21
25
immediate
Op
Rs1
Rd
Jump / Call
31
26
0
25
target
Op
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Assembly Language vs. Machine Language

• Assembly provides convenient symbolic
  representation
• much easier than writing down numbers
• e.g., destination first
• Machine language is the underlying reality
• e.g., destination is no longer first
• Assembly can provide 'pseudoinstructions'
• e.g., move R1, R2 exists only in Assembly
• would be implemented using add R1,R2,R
• When considering performance you should count
  real instructions

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Dlx - Registers

• 32 gpr registers r0,r1,r2,.r31
• 32 floating point registers f0,f1,f2,.f31
• R0 always holds zero (reduces the number of
  opcodes)
• 1 floating point status register (result of last
  compare)
• Add r1,r2,r3
• Registersr1 registersr2 registersr3

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C to machine language

• A300 h a300
• lw r1, 1200(R2) ri format
• add r1,r2,r3 rr format
• sw 1200(R3), r1

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Control

• Decision making instructions
• alter the control flow,
• i.e., change the "next" instruction to be
  executed
• DLX conditional branch instructions beqz r2,
  Label bnez r2, Label
• Example if (ij) h i j

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Transfers

• Jump xxx pc xxx
• Coded value is signed offset from pc4 (25 bit
  number)
• Jal xxx (jump and link)
• Cont of R31 pc4, pc xxx
• Coded value is signed offset from pc4 (25 bit
  number)
• Jr (jump to register)
• BEQZ r,xxx (offset in 16 bits from pc4)
• BNEZ r,xxx
• SLT r1,r2,r3 r1 1 if (r2 lt r3)
  LT,GT,LE,EQ,NE

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Example GOTO LOOP

• Loop
• G G AI
• I I J
• IF ( I ! H) goto LOOP r1g,r2a0, r3 I,
  r4 j, r5 h