Analog Design Automation

1
Analog Design Automation

• Integration of analog and digital functions on a
  single chip
• Performance power area trade-offs
• Rapidly evolving digital technology
• Analog circuits do not scale well
• Increasing portion of the design and
  manufacturing cost
• Analog on SoC 2 transistor, 20 area, 50
  respins
• Ref Digital-Analog Convergence, Executive
  Technology Brief, Cadence

2
Global Optimization

• Global optimization problem in standard form

• Mapping of analog design constraintsas
  optimization problem
• Minimize power and/or area
• Constraints on performance metrics
• Computationally hard problem

3
Convex Optimization

• Global optimization problem in standard form

convex
affine (a1x1 anxn b)

• Benefits
• Local minima are global minima
• Efficient numerical algorithms
• Extensive theory
• Problem convexity of objective and constraints

4
Non-convex Extensions

• Reversed Geometric Programming
• Can model almost all analog design problems
• Computationally hard problem ?
• But
• we separated the hard and the easy
  constraints
• there are relatively few reversed constraints

5
Optimization Example SC OTA
Vpp 1V SNR 74 dB varying fs ST 0.18 µm
technology
6
Optimization Example SC OTA
simulation /- 5
ST 0.18 µm technology
7
SC OTA Design vs Simulation
8
SC OTA Power penalty of GP
9
Optimization Pipelined ADC

• Quantize signal and calculate residue
• Accuracy bottleneck residue amplifier gain
  accuracy
• Speed bottleneck residue amplifier settling
• Design parameter B

10
Pipelined ADC - OTA

• High speed
• Low gain
• Nonlinear

Vpp 1V SNR 65 dB varying fs ST 0.13 µm
technology
11
Pipelined ADC - OTA