ASIC/SoC Physical Design

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ASIC/SoC Physical Design

• Offering Silicon wafer manufacturing process
  including 5nm, 7nm, 12nm, 16nm, 2.5D packaging
  technology, ASIC/SoC Physical Design, SoC Micro
  architecture.
• OpenFive experts in Physical Design Methodologies
  have completed complex chip tape-outs in a
  variety of process nodes including 7nm.
• These designs include complex high speed
  interfaces such as HBM2E, PCIe Gen4, and 56G
  SerDes targeting high-performance applications in
  AI, Networking, and High-Performance Computing
  (HPC)

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Wafer Manufacturing

• We partner with world-class foundries and offer
  wide range of processes including leading edge
  5nm, 7nm, 12nm, 16nm for high performance logic,
  and more mature nodes for analog or mixed signal
  applications.
• OpenFive is a long-standing member of TSMCs
  Value Chain Aggregator (VCA) program.
• OpenFive provides a complete solution from
  package selection through design and development,
  to high-volume manufacturing.
• We understand the importance of selecting the
  proper packaging solution to meet the technical
  and cost constraints of each design.
• Our packaging capabilities include 2.5D
  technology, and OpenFives extensive experience
  enables us to meet the unique needs of each
  customer and successfully launch their product.

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Front-end Design, Integration, and Verification

• Design expertise for building scalable,
  customized SoCs with in-house design,
  integration, and advanced verification using
  automated tools and methodology.
• SOC Micro-architecture
• RTL Design and Synthesis
• SOC IP Integration
• Design Verification
• FPGA Prototyping

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IP Development and Integration

• Close engagement with 70 IP Partners
• Upfront technical evaluation
• Pre-negotiated TCs
• OpenFive is a single-window for customers.
• Comparative analysis for best PPACM

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• Please do visit my website for
• in-depth information.
• Website https//openfive.com/
• ASIC/SoC Physical Design https//openfive.com/cus
  tom-silicon/