Circuitos Integrados de Aplicacin Especfica

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Circuitos Integradosde Aplicación Específica
.
Principios Generales
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The Design Productivity Challenge
Logic Transistors per Chip (K)
Productivity (Trans./Staff-Month)
1981
1983
1985
1987
1989
1991
1993
1995
1997
1999
2001
2003
2005
2007
2009
A growing gap between design complexity and
design productivity
Source sematech97
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A Simple Processor
Red de interconexiones
MEMORY
INPUT/OUTPUT
CONTROL
INPUT-OUTPUT
DATAPATH
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A System-on-a-Chip Example
Courtesy Philips
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Impact of Implementation Choices
100-1000
Domain-specific processor (e.g. DSP)
10-100
Embedded microprocessor
Energy Efficiency (in MOPS/mW)
1-10
Hardwired custom
Configurable/Parameterizable
0.1-1
Somewhat flexible
Flexibility(or application scope)
Fully flexible
None
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Design Methodology

• Design process traverses iteratively between
  three abstractions behavior, structure, and
  geometry
• More and more automation for each of these steps
  

Diseño traducción iterativa entre diferentes
niveles de representación en todos los niveles de
abstracción
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Estrategias de diseño

• Viabilidad económica
• Prestaciones
• Tamaño
• Tiempo de diseño
• Testabilidad

• Diseño estructurado
• Jerarquía
• Regularidad
• Modularidad
• Localidad

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Hierarchy

• Divide and conquer
• compose system from simpler widgets
• Analogy with software
• break large programs into threads and subroutines
• Hierarchy can be there in all domains
• behavior, structural, physical
• The hierarchy in different domains may not
  correspond
• e.g. a structural hierarchy may not map well to
  physical

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Example of Structural Hierarchy
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Example of Physical Hierarchy
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Example of Structural Hierarchy
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Example of Physical Hierarchy
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Repartitioning Structural Hierarchy to Fit
Physical Hierarchy
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Regularity

• Hierarchy breaks a system into submodules
• but this may not solve the complexity problem
• there may not be any regularity in the
  subdivision
• we just end up with a large of different
  submodules
• Regularity as a guide
• subdivide into a set of similar building blocks
• e.g. RAM composed of identical cells
• Regularity means that the hierarchical
  decomposition of a large system should result in
  not only simple, but also similar blocks, as much
  as possible

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Regularity (contd.)

• Regularity can be at all levels
• circuit use identically sized transistors
• gate similar gate structures
• higher level architectures with identical
  processors
• Regularity helps in many ways
• correct by construction
• reuse of design
• simplify verification of correctness

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Circuit-level Regularity Example

• A 2-1 Mux
• D-type edge triggered flipflop
• One-bit full add
• All designed using inverter and tristate buffer

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Modularity

• Condition that submodules have well-defined
  functions and interfaces
• in addition to regularity and hierarchy
• Well-formed modules allow their interaction
  with others to be well-characterized
• Depends on the situation
• e.g. in s/w a subroutine has a well-defined
  interface
• argument list with typed variables
• e.g. in IC a well-defined physical, structural,
  and behavioral interface
• pin position, layer, size, signal type,
  electrical characteristics, logic function

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Why Modularity?

• Allows the design of system to be broken up with
  confidence that the system will work as specified
  when the parts are combined
• Allows team design by a number of designers
• Examples
• bad use use of transmission gates as inputs
• internal signals now depend on source impedance
• bad use use dynamic CMOS logic but fail to latch
  or register the inputs
• timing of each module will have to be checked

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Example of Poor Modularity
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Locality

• Modularity provided well-characterized
  interfaces
• internals of modules unimportant to exterior
  interface
• internal details remain at the local level
• a form of information hiding
• reduces apparent complexity of the module
• Locality ensures that connections are between
  neighboring modules, avoiding long-distance
  connections
• Example timing locality so that time critical
  operations are local
• clock generation and distribution network
• entire clock cycle for global signals to traverse
  chip
• placement so that global wiring is minimized
• Analogy with software
• global variables are to be avoided

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Parallels between H/W S/W Design

• Strong parallels in the way VLSIs are designed
  and the way complex software is
• HDLs used to describe hardware systems in essence
  merge these two disciplines
• software methods used to define hardware
• Hardware-software Co-design
• But, cant ignore hardware aspects entirely
• important since a physical chip is the end product