Title: Arithmetic%20I%20CPSC%20350
1Arithmetic ICPSC 350
2Any Questions?
3What happened so far?
- We learned the basics of the MIPS assembly
language - We briefly touched upon the translation to
machine language - We formulated our goal, namely the implementation
of a MIPS processor.
4Pipelined MIPS Processor
5Welcome to the Future!
- The execution of machine instructions can follow,
for example, the steps - Instruction fetch
- Instruction decode and register read
- Execute opn. or calculate an address
- Access operand in data memory
- Write the result into a register
6Pipelined MIPS Processor
We concentrate first on the arithmetic-logic unit
7The Arithmetic-Logic Unit
- Arithmetic (addition and subtraction)
- we need to know number representations
- there exist various interesting algorithms for
addition and subtraction - integer and floating point arithmetic
- Logical operations (and, or, not)
8Computer Arithmetic
9Unsigned Numbers
- 32 bits are available
- Range 0..232 -1
- 11012 232220 1310
- Upper bound 232 1 4,294,967,295
10Unsigned Numbers
- If we have n bit unsigned integers, then addition
really means - ab mod 2n
- For example, if n4, then
- 11012 10012 13 9 22 6 mod 16
- 11012 10012 01102
11Number representations
- What signed integer number
- representations do you know?
12Signed Numbers
- Sign-magnitude representation
- MSB represents sign, 31bits for magnitude
- Ones complement
- Use 0..231-1 for non-negative range
- Invert all bits for negative numbers
- Twos complement
- Same as ones complement except
- negative numbers are obtained by inverting all
bits and adding 1
13Ones Complement
- Suppose we want to express -30 as an 8bit integer
in ones complement representation. - 30 0001 11102
- Invert the bits to obtain the negative number
- -30 1110 00012
14Twos Complement
- Suppose we want to express -30 as an 8bit integer
in twos complement representation. - 30 0001 11102
- Invert the bits to obtain the negative number
- 1110 00012
- Add one
- -30 1110 00102
15Advantages and Disadvantages
- sign-magnitude representation
- ones complement representation
- twos complement representation
16Signed Numbers (3bits)
sign magnitude ones complement twos complement
0002 0 0002 0 0002 0
0012 1 0012 1 0012 1
0102 2 0102 2 0102 2
0112 3 0112 3 0112 3
1002 -0 1002 -3 1002 -4
1012 -1 1012 -2 1012 -3
1102 -2 1102 -1 1102 -2
1112 -3 1112 -0 1112 -1
17Twos complement
- The unsigned sum of an n-bit number and its
negative yields? - Example with 3 bits
- 0112
- 1012
- 10002 2n gt negate(x) 2n-x
- Explain ones complement
18MIPS 32bit signed numbers
- 0000 0000 0000 0000 0000 0000 0000 0000two 0ten
- 0000 0000 0000 0000 0000 0000 0000 0001two
1ten - 0000 0000 0000 0000 0000 0000 0000 0010two
2ten - ...
- 0111 1111 1111 1111 1111 1111 1111 1110two
2,147,483,646ten - 0111 1111 1111 1111 1111 1111 1111 1111two
2,147,483,647ten - 1000 0000 0000 0000 0000 0000 0000 0000two
2,147,483,648ten - 1000 0000 0000 0000 0000 0000 0000 0001two
2,147,483,647ten - 1000 0000 0000 0000 0000 0000 0000 0010two
2,147,483,646ten - ...
- 1111 1111 1111 1111 1111 1111 1111 1101two
3ten - 1111 1111 1111 1111 1111 1111 1111 1110two
2ten - 1111 1111 1111 1111 1111 1111 1111 1111two
1ten -
19Conversions
- How do you convert an n-bit number
- into a 2n-bit number?
- (Assume twos complement representation)
20Conversions
- Suppose that you have 3bit twos complement
number - 1012 -3
- Convert into a 6bit twos complement number
- 1111012 -3
- Replicate most significant bit!
21Comparisons
- What can go wrong if you accidentally
- compare unsigned with signed numbers?
22Comparisons for unsigned
- Register s0
- 1111 1111 1111 1111 1111 1111 1111 1111
- Register s1
- 0000 0000 0000 0000 0000 0000 0000 0001
- Compare registers (set less than)
- slt t0, s0, s1 true, since 1 lt 1
- sltu t1, s0, s1 false, since 232-1gt1
23Addition Subtraction
- Just like in grade school (carry/borrow 1s)
0111 0111 0110 0110 - 0110 - 0101 - 1101 0001 0001
- Two's complement operations are simple
- subtraction using addition of negative numbers
0111 7 1010 -6 0001
24MIPS instructions
- lb loads a byte and stores the sign-extended
version in a word. - lbu loads a byte and stores it in a word
- Which of these two is typically used to process
characters?
25Overflow
- Overflow means that the result is too large for
- a finite computer word. For instance, adding two
n-bit numbers does not yield an n-bit number. - Suppose we add two 3-bit numbers 111
001 - 1000
26Detecting Overflow
- No overflow when adding a positive and a negative
number - No overflow when signs are the same for
subtraction - Overflow occurs when the value affects the sign
- overflow when adding two positives yields a
negative - or, adding two negatives gives a positive
- or, subtract a negative from a positive and get a
negative - or, subtract a positive from a negative and get a
positive
27Detecting Overflow
Operation Operand A Operand B Overflow if result
AB gt0 gt0 lt0
AB lt0 lt0 gt0
A-B gt0 lt0 lt0
A-B lt0 gt0 gt0
28Effects of Overflow
- An exception (interrupt) occurs
- Control jumps to predefined address for exception
- Interrupted address is saved for possible
resumption - Don't always want to detect overflow
- MIPS instructions addu, addiu, subu note
addiu still sign-extends!
29Building an Arithmetic Logic Unit
30Logic Gates AND
a
c
a b c 0 0 0 0 1 0 1 0 0 1 1 1
b
31Logic Gates OR
a
c
b
a b c 0 0 0 0 1 1 1 0 1 1 1 1
32An ALU (arithmetic logic unit)
- Let's build an ALU to support the andi and ori
instructions - Selection of operation 0 and, 1 or
- we'll just build a 1 bit ALU, and use 32 of
them - Possible Implementation (sum-of-products)
a
b
33The Multiplexor
- Selects one of the inputs to be the output,
based on a control input - Build (and/or) ALU using a MUX
note it is called a 2-input mux even
though it has 3 inputs!
0
1
34Different Implementations
- Not easy to decide the best way to build
something - Don't want too many inputs to a single gate
- for our purposes, ease of comprehension is
important - Dont want to have to go through too many gates
- Let's look at a 1-bit ALU for addition
cout a b a cin b cin sum a xor b xor cin
35Different Implementations
- How could we build a 1-bit ALU for add, and, and
or? - How could we build a 32-bit ALU?
36Building a 32 bit ALU
37What about subtraction (a b) ?
- Two's complement approach just negate b and
add. - How do we negate?
- A solution