CENG 241 Digital Design 1 Lecture 4

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CENG 241Digital Design 1Lecture 4

• Amirali Baniasadi
• amirali_at_ece.uvic.ca

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This Lecture

• Review of last lecture Gate-Level Minimization
• Continue Chapter 3Dont-Care Conditions,
  Implementation

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Gate-Level Minimization

• The Map Method
• A simple method for minimizing Boolean functions
• Map diagram made up of squares
• Each square represents a minterm

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Three-Variable Map
Each variable is 1 in 4 squares, 0 in 4 squares
Each variable is 1 in 4 squares, 0 in 4 squares
Variable appears unprimed in squares equal to
1 Variable appears primed in squares equal to 0
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Four-Variable Map
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Five-Variable Map
Maps for more than four variables are not easy to
use. Five-variable maps require 32
squares. Alternative Use two four-variable maps
to make a five-variable one Minterms 0 to 15 in
one map. 16 to 31 in the other one.
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Five-Variable Map
Each square in the A0 map is adjacent to the
corresponding one in the A1 map.
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0s in the map
For a function F, combining the 0 squares gives
us F. By using F and the DeMorgans law, we
can simplify the function to product of sums.
FABCDBD
TYPO
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Gate implementation-example 4
SUM of Products
Products of Sums
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Dont-Care Conditions

• There are applications that the function is not
  specified for certain combinations and variables.
• Example four bit BCD has 6 combinations that are
  not used.
• Mark dont-cares with X, assume either 1 or 0 to
  simplify the function.

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Design Procedure example 1

• Code Conversion BCD to excess 3
• input BCD Output Excess-3
  code
• A B C D w x y z
• 0 0 0 0 0 0 1 1
• 0 0 0 1 0 1 0 0
• 0 0 1 0 0 1 0 1
• 0 0 1 1 0 1 1 0
• 0 1 0 0 0 1 1 1
• 0 1 0 1 1 0 0 0
• 0 1 1 0 1 0 0 1
• 0 1 1 1 1 0 1 0
• 1 0 0 0 1 0 1 1
• 1 0 0 1 1 1 0 0
  

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Maps for BCD to excess-3 code converter
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Circuit BCD to excess-3 code converter
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Dont-Care Conditions
Simplify the Boolean function
F(w,x,y,z)S(1,3,7,11,15) which has the
dont-care conditions d(w,x,y,z) S(0,2,5)
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NAND and NOR implementations
Ease of fabrication Digital circuits are made
of NAND or NOR, rather than AND and OR gates. We
need rules to convert from AND/OR/NOT to NAND/NOR
circuits. NAND gate is a universal gate because
any digital circuit can be implemented using it.
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Graphic symbols for NAND gates
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Two-Level Implementation
Three implementations for A.BC.D
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Example 3-10

• Implement the following function with NAND gates
  F(x,y,z)(1,2,3,4,5,7)

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Multilevel NAND circuits

• Sum of Products and Product of Sums result in two
  level designs
• Not all designs are two-level e.g.,
  FA.(C.DB)B.C
• How do we convert multilevel circuits to NAND
  circuits?
• Rules
• 1-Convert all ANDs to NAND gates with
  AND-invert symbol
• 2-Convert all Ors to NAND gates with invert-OR
  symbols
• 3-Check the bubbles, insert bubble if not
  compensated

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Multilevel NAND circuits
B
BC
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Multilevel NAND circuits
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NOR implementation
NOR is NAND dual so all NOR rules are dual of
NAND rules. All designs can be made by NORs
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NOR symbols
NOR implementation requires the function
expressed in product of sums
NOR implementation Rules 1-Convert all ORs to
NOR gates with OR-invert symbol 2-Convert all
ANDs to NOR gates with invert-AND symbols
3-Check the bubbles, insert bubble if not
compensated
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NOR circuits
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NOR circuits
Figure 3-23(a) converted to NOR implementation
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Summary

• Reading up to page 96
• Gate-level Minimization, Implementation