DSPboard 1.0 two measurements

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DSP-board 1.0 two measurements
Wojciech Giergusiewicz Wojciech Jalmuzna
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• Minimum latency mesured between Input output
  channel of DSP-board ver. 1.0

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Measuring conditons
Mesured input impulse width 1ms
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What we mesured
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FPGA
ADC
DAC
input
output
80 MSPS
160 MSPS
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Latency on the way from analog input to analog
output (ADC3 DAC1)ADC_at_80 MSPS DAC_at_160 MSPS
analog input
ADC digital output
analog output
DAC digital input
(oscilloscope persistant mode)
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Stretched prior picture
(oscilloscope persistant mode)
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Input to ADC3 output latency _at_ 80 MSPS(proof if
it really takes 4 clocks)
analog input
ADC3 clock
ADC3 digital (bit MSB)
(LeCroy oscilloscope probes only 500MHz band...)
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DAC1 latency _at_ 160 MSPS
DAC1 digital input (bit MSB)
ADC3 clock
analog output
Latency 18-20 clock cycles
(LeCroy oscilloscope probes only 500MHz band...)
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Poof that interference on DAC1 input were from
oscilloscope probe
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Frequency of the regular interference on analog
output (channel1)
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Rough summary
54 ns
120 ns
20 ns
FPGA
ADC
DAC
input
output
80 MSPS
160 MSPS
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Input channel (ADCs) Noise level
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measurement circuit for ADC1
ADC
Input stage
FPGA
Matlab
measurement circuit for ADC2..8
ADC
Input stage
FPGA
Matlab
50 Ohm
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ADC1's typical waveform
ADC1 ( ADCs input short circuited )
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floating
sample waveforms
terminated
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(No Transcript)
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Voltage offsets mV
channels offsets
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SIMCONcomparison
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SIMCON
existing system measured at 40Mhz
terminated
3.1 mV
voltage offset - terminated
floating
51.1 mV
voltage offset - floating