Computer system organization

1
Computer system organization

• Chapter 7
• Assembly languages

2
Outlines

• Assembly language
• Instruction format
• Addressing mode
• Intel 80x86 instructions
• Sparc instructions

3
Assembly Languages

• One step up from machine language
• Originally a more user-friendly way to program
• Now mostly a compiler target
• Assembler finishes it off
• Model of computation stored program computer

4
Assembly Language Model
Memory
add r1,r2 sub r2,r3 cmp r3,r4 bne I1 sub
r4,1 I1 jmp I3
Registers
ALU
PC
5
Assembly Language Instructions

• Built from two pieces

Add R1, R3, 3
Operands Where to get data and put the results
Opcode What to do with the data (ALU operation)
6
Types of Opcodes

• Arithmetic, logical
• add, sub, mult
• and, or
• Cmp
• Data transfer (I/O)
• ld, st, mov
• Control transfer
• jmp
• bne
• Call/ret
• Complex
• movs

7
Operands

• Each operand taken from a particular addressing
  mode
• Examples
• Register add r1, r2, r3
• Immediate add r1, r2, 10
• Direct mov r1 (100)
• Rigister Indirect mov r1, (r2)
• Index(offset) mov r1, 10(r3)
• PC Relative beq 100

8
Addressing Modes (type of operand)

• Immediate
• Direct
• Indirect
• Register
• Register Indirect
• Displacement (Indexed)
• Stack

9
Immediate Addressing

• Operand address field
• e.g. ADD 5,
• Add 5 to contents of accumulator
• No memory reference to fetch data
• Fast
• Limited range

10
Direct Addressing Diagram
Instruction
Address A
Opcode
Memory
ADD 100
100
Operand
11
Indirect Addressing Diagram
Instruction
Address A
Opcode
Memory
Pointer to operand
Operand
12
Register Addressing (1)

• Operand is held in register named in address
  filed
• E.g. inc i0
• Limited number of registers
• Very small address field needed
• Shorter instructions
• Faster instruction fetch

13
Register Addressing Diagram
Instruction
Register Address R
Opcode
Registers
Operand
14
Register Indirect Addressing Diagram
Instruction
Register Address R
Opcode
Memory
Registers
Operand
Pointer to Operand
15
Displacement Addressing (Indexed)

• EA A (R) e.g. 10(r)
• Address field hold two values
• A base value
• R register that holds displacement (offset)
• or vice versa
• For accessing array elements

16
Displacement Addressing Diagram
Instruction
Array1100
Address A
Register R
Opcode
Memory
Registers
Array1
1
100
Pointer to Operand
Operand

17
Base-Register Addressing (stack)

• A holds displacement
• R holds pointer to base address
• R may be explicit or implicit
• e.g. segment registers in 80x86

18
Stack Addressing

• Operand is (implicitly) on top of stack
• e.g
• fp 20 or
• 20(fp)

19
Types of Assembly Languages

• Assembly language closely tied to processor
  architecture
• At least four main types
• CISC Complex Instruction-Set Computer
• RISC Reduced Instruction-Set Computer
• DSP Digital Signal Processor
• VLIW Very Long Instruction Word

20
CISC Assembly Language

• Developed when people wrote program with assembly
  language
• Complicated, often specialized instructions with
  many effects
• Examples from x86 architecture
• String move
• Procedure enter, leave
• Many, complicated addressing modes
• So complicated, often executed by a little
  program (microcode)

21
RISC Assembly Language

• Response to growing use of compilers
• Easier-to-target, uniform instruction sets
• Make the most common operations as fast as
  possible
• Load-store architecture
• Arithmetic only performed on registers
• Memory load/store instructions for
  memory-register transfers
• Designed to be pipelined

22
Example Euclids Algorithm

• In C
• int gcd(int m, int n)
• int r
• while ( (r m n) ! 0)
• m n
• n r
• return n

Two integer parameters
One local variable
Remainder operation
Data transfer
Non-zero test
23
X86 Programmers Model
31
0
15
0
eax
cs
Code
Mostly general-purpose registers
ebx
ds
Data
ecx
ss
Stack
edx
es
Extra
fs
Data
esi
Source index
gs
Data
edi
Destination index
ebp
Base pointer
Segment Registers Added during address
computation
esp
Stack pointer
eflags
Status word
eip
Instruction Pointer (PC)
24
Euclids Algorithm on the x86
ebp

• .file "euclid.c"
• .version "01.01"
• gcc2_compiled.
• .text
• .align 4
• .globl gcd
• .type gcd,_at_function
• gcd
• pushl ebp
• movl esp,ebp
• pushl ebx
• movl 8(ebp),eax
• movl 12(ebp),ecx
• jmp .L6

ebp
esp
25
Euclids Algorithm on the x86

• jmp .L6
• .p2align 4,,7
• .L4
• movl ecx,eax
• movl ebx,ecx
• .L6
• cltd
• idivl ecx
• movl edx,ebx
• testl edx,edx
• jne .L4
• movl ecx,eax
• movl -4(ebp),ebx
• leave
• ret

Jump to local label .L6
Skip as many as 7 bytes to start on a 16-byte
boundary
Sign-extend eax to edxeax
Compute edxeax ? ecx quotient in eax,
remainder in edx
Register assignments eax m ebx r ecx n
while ((r m n) ! 0) m n n
r return n
26
Euclids Algorithm on the i386

• jmp .L6
• .p2align 4,,7
• .L4
• movl ecx,eax
• movl ebx,ecx
• .L6
• cltd
• idivl ecx
• movl edx,ebx
• testl edx,edx
• jne .L4
• movl ecx,eax
• movl -4(ebp),ebx
• leave
• ret

m n
n r
compute AND of edx and edx, update the status
word, discard the result
Branch back to .L4 if the zero flag is clear,
I.e., the last arithmetic operation did not
produce zero
while ((r m n) ! 0) m n n
r return n
27
Euclids Algorithm on the i386

• jmp .L6
• .p2align 4,,7
• .L4
• movl ecx,eax
• movl ebx,ecx
• .L6
• cltd
• idivl ecx
• movl edx,ebx
• testl edx,edx
• jne .L4
• movl ecx,eax
• movl -4(ebp),ebx
• leave
• ret

return n (caller expects value in eax)
move ebp to esp and pop ebp from the stack
Pop a return address from the stack and branch
to it
28
SPARC Programmers Model
29
SPARC Register Windows

• The output registers of the calling procedure
  become the inputs to the called procedure
• The global registers remain unchanged
• The local registers are not visible across
  procedures

Caller 2
Caller 1
30
Code produced on Sealion (1)
.file "euclide.c" gcc2_compiled.
.global .rem .section ".text"
.align 4 .global gcd .type
gcd,function .proc 04
31
Code produced on Sealion (2)
gcd save sp, -120, sp
st i0, fp68 st i1,
fp72 .LL3 ld fp68, o1
mov o1, o0 ld fp72,
o1 call .rem, 0 nop
m -gtstack
n -gtstack
m -gto1
n -gt o0
32
Code produced on Sealion (3)
mov o0, o1 st o1,
fp-20 cmp o1, 0 bne
.LL5 nop b .LL4
nop .LL5 ld fp72, o0
st o0, fp68 ld fp-20,
o0 st o0, fp72 b
.LL3 nop .
r -gt o1
n replaces m and r replaces n
33
Code produced on Sealion (4)
LL4 ld fp72, o0 mov
o0, i0 b .LL2
nop .LL2 ret restore .LLfe1
.size gcd,.LLfe1-gcd .ident "GCC
(GNU) 2.95.2 19991024 (release)
n to i0 which is its input and output of its
caller
Branch back to caller SPARC has no ret this
is jmp i7 8
34
Sparc stack structure
sp
Smaller address
92 bytes
96
callee
Local variables
fp
L0-L7 i0-i7 (4x1664)
92 bytes
fp0x44
caller
o0-o5
35
Euclids Algorithm on the SPARC

• .file "euclid.c"
• gcc2_compiled.
• .global .rem
• .section ".text"
• .align 4
• .global gcd
• .type gcd,function
• .proc 04
• gcd
• save sp, -112, sp
• mov i0, o1
• b .LL3
• mov i1, i0

Assembler directives start with .
This will be executable code
gcd is a linker-visible label
36
Euclids Algorithm on the SPARC

• .file "euclid.c"
• gcc2_compiled.
• .global .rem
• .section ".text"
• .align 4
• .global gcd
• .type gcd,function
• .proc 04
• gcd
• save sp, -112, sp
• mov i0, o1
• b .LL3
• mov i1, i0

Advance the register windows. Allocate space on
the stack.
Move argument 0 (m) into o1
Branch to .LL3 after executing the next
instruction
The SPARC doesnt have a mov instruction the
assembler replaces this with or g0, i1, i0
37
Euclids Algorithm on the SPARC

• mov i0, o1
• b .LL3
• mov i1, i0
• .LL5
• mov o0, i0
• .LL3
• mov o1, o0
• call .rem, 0
• mov i0, o1
• cmp o0, 0
• bne .LL5
• mov i0, o1
• ret
• restore

while ((r m n) ! 0) m n n
r return n
Compute the remainder of m ? n (result in
o0) Call is also delayed
Register assignments m o1 r o0 n i0
38
Euclids Algorithm on the SPARC
Register assignments m o1 r o0 n i0
while ((r m n) ! 0) m n n
r return n

• mov i0, o1
• b .LL3
• mov i1, i0
• .LL5
• mov o0, i0
• .LL3
• mov o1, o0
• call .rem, 0
• mov i0, o1
• cmp o0, 0
• bne .LL5
• mov i0, o1
• ret
• restore

n r
m n (executed even if loop terminates)
Branch back to caller SPARC has no ret this
is jmp i7 8
Inverse of save return to previous register
window