Design example

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Design example

• Binary Multiplier

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Block diagram
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ASM chart
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Numerical example

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Control logic
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State assignment

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State table for control circuit

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Logic diagram of control

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HDL description
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Homework

• The HDL description of a sequential binary
  multiplier given in above slides encapsulates the
  descriptions of the controller and datapath in a
  single Verilog module. Write and verify a model
  that encapsulates the controller and datapath in
  separate modules.