Finite State Machines (FSMs)

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Finite State Machines (FSMs)

• Now that we understand sequential circuits, we
  can use them to build
• Synchronous (Clocked) Finite State Machines

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• FSM components
• Next state logic (combinational) next state
  f(current state, inputs)
• Memory (sequential) stores state in terms of
  state variables
• Output logic (combinational) function depends on
  FSM type
• Moore Machine output g(current state)
• Mealy Machine output g(current state, inputs)

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FSM Analysis

• Goal Given a FSM circuit, describe the
  circuits behavior

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• Excitation equations describe memory (FF or
  latch) input signals as a function of inputs and
  current state (i.e., state variables)

Excitation Equations
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• Transition equations describe the next state as a
  function of inputs and current state
• Generated by substituting the excitation
  equations into the characteristic equation for
  the sequential gates

Transition Equations
D FF Characteristic Eqn
This step is trivial when using D FFs!
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• Output equations describe the output signals as a
  function of the current state (for a Moore
  machine) or as a function of the current state
  and inputs (for a Mealy machine)

Output Equation
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• The transition/output table shows the next state
  and output for every current state/input
  combination
• Entries of the table are obtained from the
  transition equations and the output equations

Transition/Output Table
Transition Equations
Output Equation
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• State labels are a one-to-one mapping from state
  encodings to state names
• The state/output table has the same format as the
  transition table, but state names are substituted
  in for state encodings

Transition/Output Table
State/Output Table
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• A state diagram is a graphical representation of
  the information in the state/output table
• Nodes (or vertices) represent states
• Moore machines output values are written in
  state node
• Arcs (or edges) represent state transitions
• Labeled with a transition expression
• when an arcs transition expression evaluates to
  1 for a given input combination, that arc is
  followed to the next state
• Mealy machines output values (or expressions)
  are written on arcs

State/Output Table
State Diagram
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FSM Analysis Recap

1. Find the circuits excitation equations
2. Using the excitation and characteristic
   equations, write the circuits transition
   equations
3. Write the circuits output equations
4. From the transition and output equations, create
   the circuits transition/output table
5. Create state labels
6. Using the transition table and state labels,
   create the state table
7. (optional) Draw the circuits state diagram

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FSM Design

• Goal Design a FSM that satisfies the
  requirements of the given problem description
  (spec.)
• Follow FSM analysis steps in reverse! (more or
  less)
• (optional) Construct state diagram
• Construct state/output table
• Create state assignments
• Create transition/output table
• Choose FF type
• Construct excitation/output table
• - Similar to transition/output table
• Find excitation and output logic equations

Art of design
Turn the crank
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FSM Design Example

• Problem description design a Moore FSM with one
  input IN and one output OUT, such that OUT is one
  iff IN is 1 for three consecutive clock cycles
• State table

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• State Assignments
• How many state variables are needed to encode
  four states?
• In general, if we have n states, how many state
  variables are needed to encode those states?

These state assignments may seem rather arbitrary
thats because they are! We will soon see the
impact that state assignments have on our final
circuit
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• Transition/output table
• Choose FF type
• Using D flip-flops will simplify things (as well
  see below)
• Excitation table
• Shows FF input values required to create next
  state values for every current state/input
  combination
• If were designing with D FFs, entries in
  excitation/output table are the same as those in
  transition/output table!
• Because of D FF characteristic equation Q D

State/Output Table
Transition/Output Table
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• Excitation Logic

Excitation/Output Table

• Output Logic

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• Circuit

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In Class Exercise

• Design a state/output table for the following
  problem specification
• Combination lock Two inputs, X and Y, encode a
  binary number between 0 and 3 (X is MSB, i.e., XY
  10 ?2). A single output signal UNLOCK should
  be set to 1 iff the sequence 1, 2, 1 occurs on
  the inputs in three consecutive clock cycles

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FSM Transition List Design50s Vending Machine

• Inputs
• d asserted when user inserts dime
• n asserted when user inserts nickel
• c asserted when user presses candy button
• s asserted when user presses soda button
• Outputs
• dc dispenses candy when asserted
• ds dispenses soda when asserted
• cr 4-bit unsigned number, represents the users
  credit
• Specifications
• All inputs are one-hot
• Candy costs 10 cents, soda costs 15 cents
• Money need only be counted up to 15 cents

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Vending Machine State Diagram and Transition List
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50s Vending Machine Mealy Implementation
The Mealy implementation uses fewer states, and
therefore fewer FFs!
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State Assignments

• Back to our combinational lock example

Minimal SOP 26 literals
Minimal POS 20 literals
Perhaps we can do better using smarter state
assignments
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• Another state assignment approach
• Maximize the number of 1s

Minimal SOP 10 literals
Minimal POS 9 literals
Using smarter state assignments improved the
next-state circuit cost from 20 literals to 9
literals!
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• Another approach use more flip-flops
• one-hot encodings (with the addition of 000)

Read minterms directly off of transition table
How many states are really in our new state
machine?
What happened to the other 4 states???
23 literals
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Unused States

• Previous design all unused states were
  implicitly assigned a next state of 000 (state
  A)
• This is known as a safe design
• If noise causes the machine to enter an unused
  state, it will return to a used state under any
  input conditions

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• Efficient Design Treat the next-states and
  outputs of unused states as dont cares
• Minimizes circuit cost!
• If an unused state is ever entered, state machine
  may never return to normal operation

Finding transition equations now requires
5-variable K-maps!
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• State clustering assigns unused states to behave
  like used states
• If noise causes an unused state to be entered,
  the machine will return to a used state in a
  single clock cycle