Reseeding-based Test Set Embedding with Reduced Test Sequences - PowerPoint PPT Presentation

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Reseeding-based Test Set Embedding with Reduced Test Sequences

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Reseeding-based Test Set Embedding with Reduced Test Sequences E. Kalligeros1, 2, D. Kaseridis1, 2, X. Kavousianos3 and D. Nikolos1, 2 1Computer Engineering ... – PowerPoint PPT presentation

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Title: Reseeding-based Test Set Embedding with Reduced Test Sequences


1
Reseeding-based Test Set Embedding with Reduced
Test Sequences
  • E. Kalligeros1, 2, D. Kaseridis1, 2, X.
    Kavousianos3 and D. Nikolos1, 2
  • 1Computer Engineering Informatics Dept.,
  • University of Patras, Greece
  • 2Research Academic Computer Technology Institute,
    Greece
  • 3Computer Science Dept., University of Ioannina,
    Greece

2
Motivation
  • Core-oriented way of designing contemporary
    Systems on Chip (SoCs) is placing a severe burden
    on the Automatic Test Equipment (ATE)
  • This designing style leads to larger and denser
    circuits that require greater test data volumes
    and longer test-application times

3
Motivation
  • IP protected systems (unknown structure) ways of
    test
  • Deterministic test set generation TPG for
    precisely reproduction of test set
  • Test-pattern compression Compressed vectors
    stored on tester and decompressed on chip with
    small built-in circuit
  • Test set embedding Encodes test patterns in
    longer sequences
  • Therefore Test-set embedding techniques with
    short test sequences are required

4
Outline of the presentation
  • Seed-selection algorithm
  • Test-sequence reduction scheme
  • Evaluation-Comparisons

5
Outline of the presentation
  • Seed-selection algorithm
  • Test-sequence reduction scheme
  • Evaluation-Comparisons

6
Seed-selection algorithm
  • We consider the classical LFSR-based reseeding
    scheme LFSR of length n and a Vector Counter
  • The algorithm receives as input the size L of the
    window that each seed expands to and a set of
    test cubes T
  • For determining a new seed the seed-algorithm
    makes uses of the well-known concept of solving
    systems of linear equations (i.e. assuming
    Gauss-Jordan elimination) Koenemann ETC91
  • If each bit of the seed of the LFSR were replaced
    by a binary variable then each one of the L
    window states would be a symbolic vector

7
Seed-selection algorithm
  • The algorithm examines all possible linear
    systems and chooses one to solve
  • If no system can be solved for any of the
    remaining test cubes the above procedure stops
    and a new window has been determined
  • Since at each step of algorithm, linear systems
    corresponding to more than one test cubes will be
    solvable at more than one positions of the
    window, as set of heuristics is needed for
    selecting the system that will be actually solved

8
Seed-selection algorithm
  • Five heuristics are utilized
  • Three basic of the algorithm proposed in
    Kalligeros et al, ISQED02
  • Two new heuristics that significantly refine the
    selection process (improved encoding ability of
    proposed algorithm)

9
Seed-selection algorithm
  • First criterion
  • At each step of the algorithm the system that is
    actually selected to be solved is the one that
    leads to the replacement of the fewest variables
    in the initial window state
  • Second criterion
  • The cube containing the maximum number of
    defined bits is the first to be selected for each
    new seed
  • Third criterion
  • Test cube set is split in two different groups
  • High priority Cubes that contain many defined
    bits
  • Low priority Rest cubes of set T
  • At each step of the algorithm, cubes of 1 are
    targeted first and only if no such cube can be
    covered then the cubes of 2 are targeted

10
Seed-selection algorithm
  • Although the application of the previous
    heuristics leads to good result in terms of
    resulting seed volumes they are not elaborate
    enough
  • At each step of the algorithm there are many
    solvable systems that require the same minimum
    number of variables to be replaced
  • The choice among them is a random choice that
    does not improve the efficiency of the algorithm.
  • For that reason two new criteria are introduced

11
Seed-selection algorithm
  • Fourth criterion
  • From the systems that require the elimination of
    the same minimum number of variables, those
    corresponding to the test cubes with the maximum
    number of defined bits are preferred
  • Fifth criterion
  • In the case the fourth criterion gives more than
    one cube then the systems corresponding to the
    cube which can be covered at the fewest positions
    within the L-state window are preferred
  • The addition of those two criteria improves
    significantly the encoding ability of the
    seed-selection algorithm resulting in 25 smaller
    seed sets on average

12
Outline of the presentation
  • Seed-selection algorithm
  • Test-sequence reduction scheme
  • Evaluation-Comparisons

13
Test-sequence reduction scheme
  • Seed-selection algorithm assumes a L state window
    for every seed
  • Only some of these states of each window are
    actually being used for reproducing a test cube
    of T
  • If the last state of a window is not a useful one
    then all states from the last useful one to the
    last state of each window are redundant
  • As more seeds are selected by the algorithm, more
    variables are replaced and thus fewer cubes are
    encoded in each seed ? more useless states at the
    end of these windows

14
Test-sequence reduction scheme
  • This problem is much more important in the case
    of test set embedding since the increased number
    of seeds leads to much longer test sequences
  • Most efficient way (in terms of test-sequence
    length)
  • Maximum reduction approach which stops the
    expansion of each seed after the clock cycle in
    which the last useful state was generated by the
    LFSR ? number of redundant states will be zero
  • Problem
  • Vector Counter has to be initialized with a
    different value at each reseeding ? Excessive
    test data storage

15
Test-sequence reduction scheme
  • An intermediate approach has to be followed
  • Proposed approach
  • Each window is segmented into a number (m) of
    equal-sized groups of LFSR states
  • The useful states of the window are included in
    the first k segments and thus the remaining m-k
    segments contain redundant states and can be
    dropped during test generation
  • Segment-Vectors Counter Generate the states of
    each group (counts from Segment_Size-1 to 0)

16
Test-sequence reduction scheme
17
Test-sequence reduction scheme
  • With proper selection of Segment_Size, the
    distance between the last useful state and the
    end of last useful segment can be minimized
  • The Upper limit of number of eliminated redundant
    states is the one of the Maximum reduction
    approach

A low hardware-overhead solution for generating
the useful segment of each window is required
18
Test-sequence reduction scheme
  • Rearrangement technique
  • Main idea
  • Order the seeds according to the number of useful
    segments
  • if these volumes for every two successive windows
    differs at most by one ? Only a single extra bit
    per seed is needed for indicating this relation.
  • Extra bit0 ? Same number of useful segment
  • Extra bit1 ? One segment difference
  • Problem
  • The difference in the number of useful segment
    between two successive (ordered) seeds may be
    greater than one
  • Solution
  • Some useless segments should be maintained in
    the window with the smaller number of useful
    segments

19
Test-sequence reduction scheme
Example of rearrangement technique
20
Test-sequence reduction scheme
  • Load Counter
  • Down counter that maintains the necessary number
    of segments for each window
  • Initially loaded with maximum number of segments
    required among all windows
  • The value of the extra bit of each window
    determines the operation of the counter
  • Extra bit1 ? Load counter decreases by one
  • Extra bit0 ? Load counter stays unchanged

21
Test-sequence reduction scheme
  • In order to actually control the generation of
    the patterns of a window, two counters are need
  • Segment-Vectors Counter Counts from
    Segment_Size-1 to 0 and controls the generation
    of the vectors of a segment
  • Segment Counter Counts the requiring number of
    segments in each window and thus initialized with
    the value of Load Counter at the beginning of a
    new window
  • These two counters constitute a combined counter
  • Segment Counters value is decreased by one every
    time Segment-Vectors Counter signals that
    Segment_Size patterns have been applied to the
    CUT

22
Test-sequence reduction scheme
  • New window generation
  • Next stored seed is loaded into LFSR
  • Segment Counter is loaded with current Load
    Counters Value
  • Load Counter is triggered (or not) according to
    value of seeds stored extra bit
  • Segment-Vectors Counter is enabled

23
Test-sequence reduction scheme
  • The previous process is repeated until all the
    seeds
  • have been expanded to their corresponding
    vector-segments
  • Extra hardware overhead of Control Logic
  • The combination of Segment and Segment-Vectors
    Counters is equal to the Vector Counter of the
    classical reseeding approach
  • Therefore H/W overhead is only the Load Counter

24
Outline of the presentation
  • Seed-selection algorithm
  • Test-sequence reduction scheme
  • Evaluation-Comparisons

25
Evaluation-Comparisons
  • First Important issue Choice of window size L
  • Affects both number of final selected seeds and
    the length of the resulting test sequences
  • As ? L ? of required seeds ?
  • But of required seeds is gradually saturated
    as ? L resulting in larger test sequences with
    small benefits for the of seeds

26
Evaluation-Comparisons
  • Second Important issue Choice of Segment_Size
  • Can be calculated easily by a very-fast brute
    force procedure
  • This procedure tests all possible segment_size
    values and chooses the best one with respect to
  • Number of allowed redundant segments in seeds
    windows
  • Number of redundant vectors in the last useful
    segment of each window
  • Running time on Pentium 2.6 GHz workstation was
    less than 2 sec

27
Evaluation-Comparisons
Results of proposed technique (?) Reduction of
test-sequence lengths of segmentation-rearrangemen
t technique compared to unreduced sequences of
the seed-selection algorithm (?) Percentage of
test-sequence reduction over those of maximum
reduction technique
28
Evaluation-Comparisons
Comparison with Twisted-Ring Counters
approach Resulting Test Sequences (?)
Twisted-Ring with Mintest (?) Twisted-Ring with
Atalanta (?) Proposed technique
Proposed technique
29
Evaluation-Comparisons
Comparison with Twisted-Ring Counters
approach Test Data Storage (?) ROM bits of
Twisted-Ring with Mintest (?) ROM bits of
Twisted-Ring with Atalanta (?) ROM bits of
Proposed technique
30
Conclusions
  • Segmentation-rearrangement techniques achieves on
    average 20,17 reduction in final test-sequence
    lengths having on average 74,76 of the reduction
    of the maximum reduction approach
  • The combination of the two proposed techniques
    (seed-selection algorithm segmentation-rearrange
    ment techn.) requires on average 85,39 and
    74,04 fewer test vectors than Twisted-Ring
    Counter for Mintest and Atalanta cases
    respectively
  • On average, compared to Twisted-Ring Counters our
    technique requires 27,79 and 39,94 less
    test-data storage for Mintest and Atalanta cases
    respectively
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