Some PCB Layout Issues

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Some PCB Layout Issues
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Ground Bounce
500 mV
GND
3
VCCI Noise
500 mV/DIV
4
VCCA Noise
500 mV/DIV
5
AD Bus Signal Quality
500 mV/DIV
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VCCA/VCCI Noise Measurements
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Original layout pattern for an FPGA implementing
a PCI core.
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Original layout pattern for an FPGA implementing
a PCI core.

• Note
• Small trace width for these array power
  connections.
• Via "islands" separating cap from FPGA

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VCCA Plane
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New FPGA Cap Layout
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New FPGA Cap Layout