Fundamentals of Microelectronics II

1
Fundamentals of Microelectronics II

• CH9 Cascode Stages and Current Mirrors
• CH10 Differential Amplifiers
• CH11 Frequency Response
• CH12 Feedback

2
Chapter 9 Cascode Stages and Current Mirrors

• 9.1 Cascode Stage
• 9.2 Current Mirrors

3
Boosted Output Impedances
4
Bipolar Cascode Stage
5
Maximum Bipolar Cascode Output Impedance

• The maximum output impedance of a bipolar cascode
  is bounded by the ever-present r? between emitter
  and ground of Q1.

6
Example Output Impedance

• Typically r? is smaller than rO, so in general it
  is impossible to double the output impedance by
  degenerating Q2 with a resistor.

7
PNP Cascode Stage
8
Another Interpretation of Bipolar Cascode

• Instead of treating cascode as Q2 degenerating
  Q1, we can also think of it as Q1 stacking on top
  of Q2 (current source) to boost Q2s output
  impedance.

9
False Cascodes

• When the emitter of Q1 is connected to the
  emitter of Q2, its no longer a cascode since Q2
  becomes a diode-connected device instead of a
  current source.

10
MOS Cascode Stage
11
Another Interpretation of MOS Cascode

• Similar to its bipolar counterpart, MOS cascode
  can be thought of as stacking a transistor on top
  of a current source.
• Unlike bipolar cascode, the output impedance is
  not limited by ?.

12
PMOS Cascode Stage
13
Example Parasitic Resistance

• RP will lower the output impedance, since its
  parallel combination with rO1 will always be
  lower than rO1.

14
Short-Circuit Transconductance

• The short-circuit transconductance of a circuit
  measures its strength in converting input voltage
  to output current.

15
Transconductance Example
16
Derivation of Voltage Gain

• By representing a linear circuit with its Norton
  equivalent, the relationship between Vout and Vin
  can be expressed by the product of Gm and Rout.

17
Example Voltage Gain
18
Comparison between Bipolar Cascode and CE Stage

• Since the output impedance of bipolar cascode is
  higher than that of the CE stage, we would expect
  its voltage gain to be higher as well.

19
Voltage Gain of Bipolar Cascode Amplifier

• Since rO is much larger than 1/gm, most of IC,Q1
  flows into the diode-connected Q2. Using Rout as
  before, AV is easily calculated.

20
Alternate View of Cascode Amplifier

• A bipolar cascode amplifier is also a CE stage in
  series with a CB stage.

21
Practical Cascode Stage

• Since no current source can be ideal, the output
  impedance drops.

22
Improved Cascode Stage

• In order to preserve the high output impedance, a
  cascode PNP current source is used.

23
MOS Cascode Amplifier
24
Improved MOS Cascode Amplifier

• Similar to its bipolar counterpart, the output
  impedance of a MOS cascode amplifier can be
  improved by using a PMOS cascode current source.

25
Temperature and Supply Dependence of Bias Current

• Since VT, IS, ?n, and VTH all depend on
  temperature, I1 for both bipolar and MOS depends
  on temperature and supply.

26
Concept of Current Mirror

• The motivation behind a current mirror is to
  sense the current from a golden current source
  and duplicate this golden current to other
  locations.

27
Bipolar Current Mirror Circuitry

• The diode-connected QREF produces an output
  voltage V1 that forces Icopy1 IREF, if Q1
  QREF.

28
Bad Current Mirror Example I

• Without shorting the collector and base of QREF
  together, there will not be a path for the base
  currents to flow, therefore, Icopy is zero.

29
Bad Current Mirror Example II

• Although a path for base currents exists, this
  technique of biasing is no better than resistive
  divider.

30
Multiple Copies of IREF

• Multiple copies of IREF can be generated at
  different locations by simply applying the idea
  of current mirror to more transistors.

31
Current Scaling

• By scaling the emitter area of Qj n times with
  respect to QREF, Icopy,j is also n times larger
  than IREF. This is equivalent to placing n
  unit-size transistors in parallel.

32
Example Scaled Current
33
Fractional Scaling

• A fraction of IREF can be created on Q1 by
  scaling up the emitter area of QREF.

34
Example Different Mirroring Ratio

• Using the idea of current scaling and fractional
  scaling, Icopy2 is 0.5mA and Icopy1 is 0.05mA
  respectively. All coming from a source of 0.2mA.

35
Mirroring Error Due to Base Currents
36
Improved Mirroring Accuracy

• Because of QF, the base currents of QREF and Q1
  are mostly supplied by QF rather than IREF.
  Mirroring error is reduced ? times.

37
Example Different Mirroring Ratio Accuracy
38
PNP Current Mirror

• PNP current mirror is used as a current source
  load to an NPN amplifier stage.

39
Generation of IREF for PNP Current Mirror
40
Example Current Mirror with Discrete Devices

• Let QREF and Q1 be discrete NPN devices. IREF
  and Icopy1 can vary in large magnitude due to IS
  mismatch.

41
MOS Current Mirror

• The same concept of current mirror can be applied
  to MOS transistors as well.

42
Bad MOS Current Mirror Example

• This is not a current mirror since the
  relationship between VX and IREF is not clearly
  defined.
• The only way to clearly define VX with IREF is to
  use a diode-connected MOS since it provides
  square-law I-V relationship.

43
Example Current Scaling

• Similar to their bipolar counterpart, MOS current
  mirrors can also scale IREF up or down (I1
  0.2mA, I2 0.5mA).

44
CMOS Current Mirror

• The idea of combining NMOS and PMOS to produce
  CMOS current mirror is shown above.

45
Chapter 10 Differential Amplifiers

• 10.1 General Considerations
• 10.2 Bipolar Differential Pair
• 10.3 MOS Differential Pair
• 10.4 Cascode Differential Amplifiers
• 10.5 Common-Mode Rejection
• 10.6 Differential Pair with Active Load

46
Audio Amplifier Example

• An audio amplifier is constructed above that
  takes on a rectified AC voltage as its supply and
  amplifies an audio signal from a microphone.

47
Humming Noise in Audio Amplifier Example

• However, VCC contains a ripple from rectification
  that leaks to the output and is perceived as a
  humming noise by the user.

48
Supply Ripple Rejection

• Since both node X and Y contain the ripple, their
  difference will be free of ripple.

49
Ripple-Free Differential Output

• Since the signal is taken as a difference between
  two nodes, an amplifier that senses differential
  signals is needed.

50
Common Inputs to Differential Amplifier

• Signals cannot be applied in phase to the inputs
  of a differential amplifier, since the outputs
  will also be in phase, producing zero
  differential output.

51
Differential Inputs to Differential Amplifier

• When the inputs are applied differentially, the
  outputs are 180 out of phase enhancing each
  other when sensed differentially.

52
Differential Signals

• A pair of differential signals can be generated,
  among other ways, by a transformer.
• Differential signals have the property that they
  share the same average value to ground and are
  equal in magnitude but opposite in phase.

53
Single-ended vs. Differential Signals
54
Differential Pair

• With the addition of a tail current, the circuits
  above operate as an elegant, yet robust
  differential pair.

55
Common-Mode Response
56
Common-Mode Rejection

• Due to the fixed tail current source, the input
  common-mode value can vary without changing the
  output common-mode value.

57
Differential Response I
58
Differential Response II
59
Differential Pair Characteristics

• None-zero differential input produces variations
  in output currents and voltages, whereas
  common-mode input produces no variations.

60
Small-Signal Analysis

• Since the input to Q1 and Q2 rises and falls by
  the same amount, and their bases are tied
  together, the rise in IC1 has the same magnitude
  as the fall in IC2.

61
Virtual Ground

• For small changes at inputs, the gms are the
  same, and the respective increase and decrease of
  IC1 and IC2 are the same, node P must stay
  constant to accommodate these changes.
  Therefore, node P can be viewed as AC ground.

62
Small-Signal Differential Gain

• Since the output changes by -2gm?VRC and input by
  2?V, the small signal gain is gmRC, similar to
  that of the CE stage. However, to obtain same
  gain as the CE stage, power dissipation is
  doubled.

63
Large Signal Analysis
64
Input/Output Characteristics
65
Linear/Nonlinear Regions

• The left column operates in linear region,
  whereas the right column operates in nonlinear
  region.

66
Small-Signal Model
67
Half Circuits

• Since VP is grounded, we can treat the
  differential pair as two CE half circuits, with
  its gain equal to one half circuits single-ended
  gain.

68
Example Differential Gain
69
Extension of Virtual Ground

• It can be shown that if R1 R2, and points A and
  B go up and down by the same amount respectively,
  VX does not move.

70
Half Circuit Example I
71
Half Circuit Example II
72
Half Circuit Example III
73
Half Circuit Example IV
74
MOS Differential Pairs Common-Mode Response

• Similar to its bipolar counterpart, MOS
  differential pair produces zero differential
  output as VCM changes.

75
Equilibrium Overdrive Voltage

• The equilibrium overdrive voltage is defined as
  the overdrive voltage seen by M1 and M2 when both
  of them carry a current of ISS/2.

76
Minimum Common-mode Output Voltage

• In order to maintain M1 and M2 in saturation, the
  common-mode output voltage cannot fall below the
  value above.
• This value usually limits voltage gain.

77
Differential Response
78
Small-Signal Response

• Similar to its bipolar counterpart, the MOS
  differential pair exhibits the same virtual
  ground node and small signal gain.

79
Power and Gain Tradeoff

• In order to obtain the source gain as a CS stage,
  a MOS differential pair must dissipate twice the
  amount of current. This power and gain tradeoff
  is also echoed in its bipolar counterpart.

80
MOS Differential Pairs Large-Signal Response
81
Maximum Differential Input Voltage

• There exists a finite differential input voltage
  that completely steers the tail current from one
  transistor to the other. This value is known as
  the maximum differential input voltage.

82
Contrast Between MOS and Bipolar Differential
Pairs

• In a MOS differential pair, there exists a finite
  differential input voltage to completely switch
  the current from one transistor to the other,
  whereas, in a bipolar pair that voltage is
  infinite.

83
The effects of Doubling the Tail Current

• Since ISS is doubled and W/L is unchanged, the
  equilibrium overdrive voltage for each transistor
  must increase by to accommodate this
  change, thus ?Vin,max increases by as well.
  Moreover, since ISS is doubled, the differential
  output swing will double.

84
The effects of Doubling W/L

• Since W/L is doubled and the tail current remains
  unchanged, the equilibrium overdrive voltage will
  be lowered by to accommodate this change,
  thus ?Vin,max will be lowered by as well.
  Moreover, the differential output swing will
  remain unchanged since neither ISS nor RD has
  changed

85
Small-Signal Analysis of MOS Differential Pair

• When the input differential signal is small
  compared to 4ISS/?nCox(W/L), the output
  differential current is linearly proportional to
  it, and small-signal model can be applied.

86
Virtual Ground and Half Circuit

• Applying the same analysis as the bipolar case,
  we will arrive at the same conclusion that node P
  will not move for small input signals and the
  concept of half circuit can be used to calculate
  the gain.

87
MOS Differential Pair Half Circuit Example I
88
MOS Differential Pair Half Circuit Example II
89
MOS Differential Pair Half Circuit Example III
90
Bipolar Cascode Differential Pair
91
Bipolar Telescopic Cascode
92
Example Bipolar Telescopic Parasitic Resistance
93
MOS Cascode Differential Pair
94
MOS Telescopic Cascode
95
Example MOS Telescopic Parasitic Resistance
96
Effect of Finite Tail Impedance

• If the tail current source is not ideal, then
  when a input CM voltage is applied, the currents
  in Q1 and Q2 and hence output CM voltage will
  change.

97
Input CM Noise with Ideal Tail Current
98
Input CM Noise with Non-ideal Tail Current
99
Comparison

• As it can be seen, the differential output
  voltages for both cases are the same. So for
  small input CM noise, the differential pair is
  not affected.

100
CM to DM Conversion, ACM-DM

• If finite tail impedance and asymmetry are both
  present, then the differential output signal will
  contain a portion of input common-mode signal.

101
Example ACM-DM
102
CMRR

• CMRR defines the ratio of wanted amplified
  differential input signal to unwanted converted
  input common-mode noise that appears at the
  output.

103
Differential to Single-ended Conversion

• Many circuits require a differential to
  single-ended conversion, however, the above
  topology is not very good.

104
Supply Noise Corruption

• The most critical drawback of this topology is
  supply noise corruption, since no common-mode
  cancellation mechanism exists. Also, we lose half
  of the signal.

105
Better Alternative

• This circuit topology performs differential to
  single-ended conversion with no loss of gain.

106
Active Load

• With current mirror used as the load, the signal
  current produced by the Q1 can be replicated onto
  Q4.
• This type of load is different from the
  conventional static load and is known as an
  active load.

107
Differential Pair with Active Load

• The input differential pair decreases the current
  drawn from RL by ?I and the active load pushes an
  extra ?I into RL by current mirror action these
  effects enhance each other.

108
Active Load vs. Static Load

• The load on the left responds to the input signal
  and enhances the single-ended output, whereas the
  load on the right does not.

109
MOS Differential Pair with Active Load

• Similar to its bipolar counterpart, MOS
  differential pair can also use active load to
  enhance its single-ended output.

110
Asymmetric Differential Pair

• Because of the vastly different resistance
  magnitude at the drains of M1 and M2, the voltage
  swings at these two nodes are different and
  therefore node P cannot be viewed as a virtual
  ground.

111
Thevenin Equivalent of the Input Pair
112
Simplified Differential Pair with Active Load
113
Proof of VA ltlt Vout
114
Chapter 11 Frequency Response

• 11.1 Fundamental Concepts
• 11.2 High-Frequency Models of Transistors
• 11.3 Analysis Procedure
• 11.4 Frequency Response of CE and CS Stages
• 11.5 Frequency Response of CB and CG Stages
• 11.6 Frequency Response of Followers
• 11.7 Frequency Response of Cascode Stage
• 11.8 Frequency Response of Differential Pairs
• 11.9 Additional Examples

114
115
Chapter Outline
CH 11 Frequency Response
115
116
High Frequency Roll-off of Amplifier

• As frequency of operation increases, the gain of
  amplifier decreases. This chapter analyzes this
  problem.

CH 11 Frequency Response
116
117
Example Human Voice I

• Natural human voice spans a frequency range from
  20Hz to 20KHz, however conventional telephone
  system passes frequencies from 400Hz to 3.5KHz.
  Therefore phone conversation differs from
  face-to-face conversation.

CH 11 Frequency Response
117
118
Example Human Voice II
Path traveled by the human voice to the voice
recorder
Path traveled by the human voice to the human ear

• Since the paths are different, the results will
  also be different.

CH 11 Frequency Response
118
119
Example Video Signal

• Video signals without sufficient bandwidth become
  fuzzy as they fail to abruptly change the
  contrast of pictures from complete white into
  complete black.

CH 11 Frequency Response
119
120
Gain Roll-off Simple Low-pass Filter

• In this simple example, as frequency increases
  the impedance of C1 decreases and the voltage
  divider consists of C1 and R1 attenuates Vin to a
  greater extent at the output.

CH 11 Frequency Response
120
121
Gain Roll-off Common Source

• The capacitive load, CL, is the culprit for gain
  roll-off since at high frequency, it will steal
  away some signal current and shunt it to ground.

CH 11 Frequency Response
121
122
Frequency Response of the CS Stage

• At low frequency, the capacitor is effectively
  open and the gain is flat. As frequency
  increases, the capacitor tends to a short and the
  gain starts to decrease. A special frequency is
  ?1/(RDCL), where the gain drops by 3dB.

CH 11 Frequency Response
122
123
Example Figure of Merit

• This metric quantifies a circuits gain,
  bandwidth, and power dissipation. In the bipolar
  case, low temperature, supply, and load
  capacitance mark a superior figure of merit.

CH 11 Frequency Response
123
124
Example Relationship between Frequency Response
and Step Response

• The relationship is such that as R1C1 increases,
  the bandwidth drops and the step response becomes
  slower.

CH 11 Frequency Response
124
125
Bode Plot

• When we hit a zero, ?zj, the Bode magnitude rises
  with a slope of 20dB/dec.
• When we hit a pole, ?pj, the Bode magnitude falls
  with a slope of -20dB/dec

CH 11 Frequency Response
125
126
Example Bode Plot

• The circuit only has one pole (no zero) at
  1/(RDCL), so the slope drops from 0 to -20dB/dec
  as we pass ?p1.

CH 11 Frequency Response
126
127
Pole Identification Example I
CH 11 Frequency Response
127
128
Pole Identification Example II
CH 11 Frequency Response
128
129
Circuit with Floating Capacitor

• The pole of a circuit is computed by finding the
  effective resistance and capacitance from a node
  to GROUND.
• The circuit above creates a problem since neither
  terminal of CF is grounded.

CH 11 Frequency Response
129
130
Millers Theorem

• If Av is the gain from node 1 to 2, then a
  floating impedance ZF can be converted to two
  grounded impedances Z1 and Z2.

CH 11 Frequency Response
130
131
Miller Multiplication

• With Millers theorem, we can separate the
  floating capacitor. However, the input capacitor
  is larger than the original floating capacitor.
  We call this Miller multiplication.

CH 11 Frequency Response
131
132
Example Miller Theorem
CH 11 Frequency Response
132
133
High-Pass Filter Response

• The voltage division between a resistor and a
  capacitor can be configured such that the gain
  at low frequency is reduced.

CH 11 Frequency Response
133
134
Example Audio Amplifier

• In order to successfully pass audio band
  frequencies (20 Hz-20 KHz), large input and
  output capacitances are needed.

CH 11 Frequency Response
134
135
Capacitive Coupling vs. Direct Coupling

• Capacitive coupling, also known as AC coupling,
  passes AC signals from Y to X while blocking DC
  contents.
• This technique allows independent bias conditions
  between stages. Direct coupling does not.

CH 11 Frequency Response
135
136
Typical Frequency Response
CH 11 Frequency Response
136
137
High-Frequency Bipolar Model

• At high frequency, capacitive effects come into
  play. Cb represents the base charge, whereas C?
  and Cje are the junction capacitances.

CH 11 Frequency Response
137
138
High-Frequency Model of Integrated Bipolar
Transistor

• Since an integrated bipolar circuit is fabricated
  on top of a substrate, another junction
  capacitance exists between the collector and
  substrate, namely CCS.

CH 11 Frequency Response
138
139
Example Capacitance Identification
CH 11 Frequency Response
139
140
MOS Intrinsic Capacitances

• For a MOS, there exist oxide capacitance from
  gate to channel, junction capacitances from
  source/drain to substrate, and overlap
  capacitance from gate to source/drain.

CH 11 Frequency Response
140
141
Gate Oxide Capacitance Partition and Full Model

• The gate oxide capacitance is often partitioned
  between source and drain. In saturation, C2
  Cgate, and C1 0. They are in parallel with
  the overlap capacitance to form CGS and CGD.

CH 11 Frequency Response
141
142
Example Capacitance Identification
CH 11 Frequency Response
142
143
Transit Frequency

• Transit frequency, fT, is defined as the
  frequency where the current gain from input to
  output drops to 1.

CH 11 Frequency Response
143
144
Example Transit Frequency Calculation
CH 11 Frequency Response
144
145
Analysis Summary

• The frequency response refers to the magnitude of
  the transfer function.
• Bodes approximation simplifies the plotting of
  the frequency response if poles and zeros are
  known.
• In general, it is possible to associate a pole
  with each node in the signal path.
• Millers theorem helps to decompose floating
  capacitors into grounded elements.
• Bipolar and MOS devices exhibit various
  capacitances that limit the speed of circuits.

CH 11 Frequency Response
145
146
High Frequency Circuit Analysis Procedure

• Determine which capacitor impact the
  low-frequency region of the response and
  calculate the low-frequency pole (neglect
  transistor capacitance).
• Calculate the midband gain by replacing the
  capacitors with short circuits (neglect
  transistor capacitance).
• Include transistor capacitances.
• Merge capacitors connected to AC grounds and omit
  those that play no role in the circuit.
• Determine the high-frequency poles and zeros.
• Plot the frequency response using Bodes rules or
  exact analysis.

CH 11 Frequency Response
146
147
Frequency Response of CS Stagewith Bypassed
Degeneration

• In order to increase the midband gain, a
  capacitor Cb is placed in parallel with Rs.
• The pole frequency must be well below the lowest
  signal frequency to avoid the effect of
  degeneration.

CH 11 Frequency Response
147
148
Unified Model for CE and CS Stages
CH 11 Frequency Response
148
149
Unified Model Using Millers Theorem
CH 11 Frequency Response
149
150
Example CE Stage

• The input pole is the bottleneck for speed.

CH 11 Frequency Response
150
151
Example Half Width CS Stage
CH 11 Frequency Response
151
152
Direct Analysis of CE and CS Stages

• Direct analysis yields different pole locations
  and an extra zero.

CH 11 Frequency Response
152
153
Example CE and CS Direct Analysis
CH 11 Frequency Response
153
154
Example Comparison Between Different Methods
Dominant Pole
Exact
Millers
CH 11 Frequency Response
154
155
Input Impedance of CE and CS Stages
CH 11 Frequency Response
155
156
Low Frequency Response of CB and CG Stages

• As with CE and CS stages, the use of capacitive
  coupling leads to low-frequency roll-off in CB
  and CG stages (although a CB stage is shown
  above, a CG stage is similar).

CH 11 Frequency Response
156
157
Frequency Response of CB Stage
CH 11 Frequency Response
157
158
Frequency Response of CG Stage

• Similar to a CB stage, the input pole is on the
  order of fT, so rarely a speed bottleneck.

CH 11 Frequency Response
158
159
Example CG Stage Pole Identification
CH 11 Frequency Response
159
160
Example Frequency Response of CG Stage
CH 11 Frequency Response
160
161
Emitter and Source Followers

• The following will discuss the frequency response
  of emitter and source followers using direct
  analysis.
• Emitter follower is treated first and source
  follower is derived easily by allowing r? to go
  to infinity.

CH 11 Frequency Response
161
162
Direct Analysis of Emitter Follower
CH 11 Frequency Response
162
163
Direct Analysis of Source Follower Stage
CH 11 Frequency Response
163
164
Example Frequency Response of Source Follower
CH 11 Frequency Response
164
165
Example Source Follower
CH 11 Frequency Response
165
166
Input Capacitance of Emitter/Source Follower
CH 11 Frequency Response
166
167
Example Source Follower Input Capacitance
CH 11 Frequency Response
167
168
Output Impedance of Emitter Follower
CH 11 Frequency Response
168
169
Output Impedance of Source Follower
CH 11 Frequency Response
169
170
Active Inductor

• The plot above shows the output impedance of
  emitter and source followers. Since a followers
  primary duty is to lower the driving impedance
  (RSgt1/gm), the active inductor characteristic
  on the right is usually observed.

CH 11 Frequency Response
170
171
Example Output Impedance
CH 11 Frequency Response
171
172
Frequency Response of Cascode Stage

• For cascode stages, there are three poles and
  Miller multiplication is smaller than in the
  CE/CS stage.

CH 11 Frequency Response
172
173
Poles of Bipolar Cascode
CH 11 Frequency Response
173
174
Poles of MOS Cascode
CH 11 Frequency Response
174
175
Example Frequency Response of Cascode
CH 11 Frequency Response
175
176
MOS Cascode Example
CH 11 Frequency Response
176
177
I/O Impedance of Bipolar Cascode
CH 11 Frequency Response
177
178
I/O Impedance of MOS Cascode
CH 11 Frequency Response
178
179
Bipolar Differential Pair Frequency Response

• Since bipolar differential pair can be analyzed
  using half-circuit, its transfer function, I/O
  impedances, locations of poles/zeros are the same
  as that of the half circuits.

CH 11 Frequency Response
179
180
MOS Differential Pair Frequency Response

• Since MOS differential pair can be analyzed using
  half-circuit, its transfer function, I/O
  impedances, locations of poles/zeros are the same
  as that of the half circuits.

CH 11 Frequency Response
180
181
Example MOS Differential Pair
CH 11 Frequency Response
181
182
Common Mode Frequency Response

• Css will lower the total impedance between point
  P to ground at high frequency, leading to higher
  CM gain which degrades the CM rejection ratio.

CH 11 Frequency Response
182
183
Tail Node Capacitance Contribution
CH 11 Frequency Response
183
184
Example Capacitive Coupling
CH 11 Frequency Response
184
185
Example IC Amplifier Low Frequency Design
CH 11 Frequency Response
185
186
Example IC Amplifier Midband Design
CH 11 Frequency Response
186
187
Example IC Amplifier High Frequency Design
CH 11 Frequency Response
187
188
Chapter 12 Feedback

• 12.1 General Considerations
• 12.2 Types of Amplifiers
• 12.3 Sense and Return Techniques
• 12.4 Polarity of Feedback
• 12.5 Feedback Topologies
• 12.6 Effect of Finite I/O Impedances
• 12.7 Stability in Feedback Systems

189
Negative Feedback System

• A negative feedback system consists of four
  components 1) feedforward system, 2) sense
  mechanism, 3) feedback network, and 4) comparison
  mechanism.

190
Close-loop Transfer Function
191
Feedback Example

• A1 is the feedforward network, R1 and R2 provide
  the sensing and feedback capabilities, and
  comparison is provided by differential input of
  A1.

192
Comparison Error

• As A1K increases, the error between the input and
  fed back signal decreases. Or the fed back
  signal approaches a good replica of the input.

193
Comparison Error
194
Loop Gain

• When the input is grounded, and the loop is
  broken at an arbitrary location, the loop gain is
  measured to be KA1.

195
Example Alternative Loop Gain Measurement
196
Incorrect Calculation of Loop Gain

• Signal naturally flows from the input to the
  output of a feedforward/feedback system. If we
  apply the input the other way around, the
  output signal we get is not a result of the
  loop gain, but due to poor isolation.

197
Gain Desensitization

• A large loop gain is needed to create a precise
  gain, one that does not depend on A1, which can
  vary by 20.

198
Ratio of Resistors

• When two resistors are composed of the same unit
  resistor, their ratio is very accurate. Since
  when they vary, they will vary together and
  maintain a constant ratio.

199
Merits of Negative Feedback

• 1) Bandwidth enhancement
• 2) Modification of I/O Impedances
• 3) Linearization

200
Bandwidth Enhancement

• Although negative feedback lowers the gain by
  (1KA0), it also extends the bandwidth by the
  same amount.

201
Bandwidth Extension Example

• As the loop gain increases, we can see the
  decrease of the overall gain and the extension of
  the bandwidth.

202
Example Open Loop Parameters
203
Example Closed Loop Voltage Gain
204
Example Closed Loop I/O Impedance
205
Example Load Desensitization
With Feedback Small Difference
W/O Feedback Large Difference
206
Linearization
207
Four Types of Amplifiers
208
Ideal Models of the Four Amplifier Types
209
Realistic Models of the Four Amplifier Types
210
Examples of the Four Amplifier Types
211
Sensing a Voltage

• In order to sense a voltage across two terminals,
  a voltmeter with ideally infinite impedance is
  used.

212
Sensing and Returning a Voltage

• Similarly, for a feedback network to correctly
  sense the output voltage, its input impedance
  needs to be large.
• R1 and R2 also provide a mean to return the
  voltage.

213
Sensing a Current

• A current is measured by inserting a current
  meter with ideally zero impedance in series with
  the conduction path.
• The current meter is composed of a small
  resistance r in parallel with a voltmeter.

214
Sensing and Returning a Current

• Similarly for a feedback network to correctly
  sense the current, its input impedance has to be
  small.
• RS has to be small so that its voltage drop will
  not change Iout.

215
Addition of Two Voltage Sources

• In order to add or substrate two voltage sources,
  we place them in series. So the feedback network
  is placed in series with the input source.

216
Practical Circuits to Subtract Two Voltage Sources

• Although not directly in series, Vin and VF are
  being subtracted since the resultant currents,
  differential and single-ended, are proportional
  to the difference of Vin and VF.

217
Addition of Two Current Sources

• In order to add two current sources, we place
  them in parallel. So the feedback network is
  placed in parallel with the input signal.

218
Practical Circuits to Subtract Two Current Sources

• Since M1 and RF are in parallel with the input
  current source, their respective currents are
  being subtracted. Note, RF has to be large
  enough to approximate a current source.

219
Example Sense and Return

• R1 and R2 sense and return the output voltage to
  feedforward network consisting of M1- M4.
• M1 and M2 also act as a voltage subtractor.

220
Example Feedback Factor
221
Input Impedance of an Ideal Feedback Network

• To sense a voltage, the input impedance of an
  ideal feedback network must be infinite.
• To sense a current, the input impedance of an
  ideal feedback network must be zero.

222
Output Impedance of an Ideal Feedback Network

• To return a voltage, the output impedance of an
  ideal feedback network must be zero.
• To return a current, the output impedance of an
  ideal feedback network must be infinite.

223
Determining the Polarity of Feedback

• 1) Assume the input goes either up or down.
• 2) Follow the signal through the loop.
• 3) Determine whether the returned quantity
  enhances or opposes the original change.

224
Polarity of Feedback Example I
Negative Feedback
225
Polarity of Feedback Example II
Negative Feedback
226
Polarity of Feedback Example III
Positive Feedback
227
Voltage-Voltage Feedback
228
Example Voltage-Voltage Feedback
229
Input Impedance of a V-V Feedback

• A better voltage sensor

230
Example V-V Feedback Input Impedance
231
Output Impedance of a V-V Feedback

• A better voltage source

232
Example V-V Feedback Output Impedance
233
Voltage-Current Feedback
234
Example Voltage-Current Feedback
235
Input Impedance of a V-C Feedback

• A better current sensor.

236
Example V-C Feedback Input Impedance
237
Output Impedance of a V-C Feedback

• A better voltage source.

238
Example V-C Feedback Output Impedance
239
Current-Voltage Feedback
240
Example Current-Voltage Feedback
241
Input Impedance of a C-V Feedback

• A better voltage sensor.

242
Output Impedance of a C-V Feedback

• A better current source.

243
Example Current-Voltage Feedback
244
Wrong Technique for Measuring Output Impedance

• If we want to measure the output impedance of a
  C-V closed-loop feedback topology directly, we
  have to place VX in series with K and Rout.
  Otherwise, the feedback will be disturbed.

245
Current-Current Feedback
246
Input Impedance of C-C Feedback

• A better current sensor.

247
Output Impedance of C-C Feedback

• A better current source.

248
Example Test of Negative Feedback
Negative Feedback
249
Example C-C Negative Feedback
250
How to Break a Loop

• The correct way of breaking a loop is such that
  the loop does not know it has been broken.
  Therefore, we need to present the feedback
  network to both the input and the output of the
  feedforward amplifier.

251
Rules for Breaking the Loop of Amplifier Types
252
Intuitive Understanding of these Rules
Voltage-Voltage Feedback

• Since ideally, the input of the feedback network
  sees zero impedance (Zout of an ideal voltage
  source), the return replicate needs to be
  grounded. Similarly, the output of the feedback
  network sees an infinite impedance (Zin of an
  ideal voltage sensor), the sense replicate needs
  to be open.
• Similar ideas apply to the other types.

253
Rules for Calculating Feedback Factor
254
Intuitive Understanding of these Rules
Voltage-Voltage Feedback

• Since the feedback senses voltage, the input of
  the feedback is a voltage source. Moreover,
  since the return quantity is also voltage, the
  output of the feedback is left open (a short
  means the output is always zero).
• Similar ideas apply to the other types.

255
Breaking the Loop Example I
256
Feedback Factor Example I
257
Breaking the Loop Example II
258
Feedback Factor Example II
259
Breaking the Loop Example IV
260
Feedback Factor Example IV
261
Breaking the Loop Example V
262
Feedback Factor Example V
263
Breaking the Loop Example VI
264
Feedback Factor Example VI
265
Breaking the Loop Example VII
266
Feedback Factor Example VII
267
Breaking the Loop Example VIII
268
Feedback Factor Example VIII
269
Example Phase Response

• As it can be seen, the phase of H(j?) starts to
  drop at 1/10 of the pole, hits -45o at the pole,
  and approaches -90o at 10 times the pole.

270
Example Three-Pole System

• For a three-pole system, a finite frequency
  produces a phase of -180o, which means an input
  signal that operates at this frequency will have
  its output inverted.

271
Instability of a Negative Feedback Loop

• Substitute j? for s. If for a certain ?1,
  KH(j?1) reaches
• -1, the closed loop gain becomes infinite.
  This implies for a very small input signal at ?1,
  the output can be very large. Thus the system
  becomes unstable.

272
Barkhausens Criteria for Oscillation
273
Time Evolution of Instability
274
Oscillation Example

• This system oscillates, since theres a finite
  frequency at which the phase is -180o and the
  gain is greater than unity. In fact, this system
  exceeds the minimum oscillation requirement.

275
Condition for Oscillation

• Although for both systems above, the frequencies
  at which KH1 and ?KH-180o are different, the
  system on the left is still unstable because at
  ?KH-180o, KHgt1. Whereas the system on the
  right is stable because at ?KH-180o, KHlt1.

276
Condition for Stability

• ?PX, (phase crossover), is the frequency at
  which ?KH-180o.
• ?GX, (gain crossover), is the frequency at
  which KH1.

277
Stability Example I
278
Stability Example II
279
Marginally Stable vs. Stable
Marginally Stable
Stable
280
Phase Margin

• Phase Margin ?H(?GX)180
• The larger the phase margin, the more stable the
  negative feedback becomes

281
Phase Margin Example
282
Frequency Compensation

• Phase margin can be improved by moving ?GX closer
  to origin while maintaining ?PX unchanged.

283
Frequency Compensation Example

• Ccomp is added to lower the dominant pole so that
  ?GX occurs at a lower frequency than before,
  which means phase margin increases.

284
Frequency Compensation Procedure

• 1) We identify a PM, then -180oPM gives us the
  new ?GX, or ?PM.
• 2) On the magnitude plot at ?PM, we extrapolate
  up with a slope of 20dB/dec until we hit the low
  frequency gain then we look down and the
  frequency we see is our new dominant pole, ?P.

285
Example 45o Phase Margin Compensation
286
Miller Compensation

• To save chip area, Miller multiplication of a
  smaller capacitance creates an equivalent effect.