SMCS332SpW / SMCS116SpW SpaceWire compliant Communication Controller ASICs

1
SMCS332SpW / SMCS116SpWSpaceWire compliant
Communication Controller ASICs Stephan Fischer,
Lars Stopfkuchen, Uwe Liebstückel, Paul
Rastetter, Luca Tunesi2 EADS Astrium GmbH Munich,
2ESA / ESTEC

• Applications
• Typical Environment SMCS332SpW and SMCS116SpW
  within a point-to-point SpaceWire network

• Motivation for Upgrading SMCS332 and SMCS116
• Existing SMCS332 and SMCS116 are often used, but
  not compliant to SpaceWire standard
  (ECSS-E-50-12A)
• Anomalies shall be corrected
• Need for protocol due to upcoming SpaceWire
  Networks with Routers

• Advantages due to SpaceWire
• Resistance against simultaneous switching on the
  data and strobe inputs
• Hot pluggable, i.e. no Master-Slave situation
  has to be arranged
• Time distribution possible
• simple interface (approx. 5000 Gates)
• high-speed (a few to hundreds of MBit/s)

• Features of SMCS116SpW
• 1 SpaceWire link from 1.25 up to 200 MBit/s (100
  MBit/s with 3 V supply)
• supports Serial Transfer Universal Protocol
  (STUP)
• Host Interface to program and control the
  SMCS116SpW
• FIFO Interface configurable between 8 and 16 bit
  mode
• ADC Interface allows to connect an ADC with a
  width of up to 16 bits
• DAC Interface

• Features of SMCS332SpW
• 3 SpaceWire links allowing full duplex
  communication with selectable bitrate from 1.25
  up to 200 MBit/s (100 MBit/s with 3 V supply)
• Communication Memory Interface (COMI) provides
  autonomous access to a communication memory.

• 8/16/32-Bit Little or Big Endian mode is
  configurable
• Host Control Interface gives read/write access to
  the configuration registers
• Control-by-Link
• Wormhole routing allows hardware routing of
  packets

• RAM Interface provides a 8/16-bit data bus and a
  16-bit address bus
• 2 UART Interfaces
• up to 24 GPIO
• Two 32-bit on-chip timer
• Enhanced 32-bit processor support
• SEU FREE

SMCS332SpW as communicationinterface for a
processor

• New header field control bit that gives more
  flexibility for packet generation
• Arbitrary packet length
• No packet size restriction for data over COMI
• SEU FREE

SMCS116SpW as communication controller for a
memory

• Implementation of SMCS332SpW
• SEU free cell library (0,5 µm) from ATMEL
• 196 pins ceramic quad flat pack (MQFP)
• Power Consumption 1,7 W (max)

• Serial Transfer Universal Protocol (STUP)
• implemented in SMCS116SpW
• minimized complexity
• makes it possible to use SMCS116SpW within a
  SpaceWire Network with distinct protocols

• Implementation of SMCS116SpW
• SEU free cell library (0,5 µm) from ATMEL
• 100 pins ceramic quad flat pack (MQFP)
• Power Consumption 0,7 W (max)

• leading path addresses are stripped off on the
  way through the network
• Protocol Identifier follows the logical address,
  unknown protocol IDs are ignored
• for SMCS116SpW first data byte is interpreted as
  command (read/write) in conjunction with 7- Bit
  SMCS116SpW register address
• Checksum over data bytes is optional

MAPLD 2005/182 -- Stopfkuchen