Date presentation

1
An Efficient Method for Chip-Level Statistical
Capacitance Extraction Considering Process
Variations with Spatial Correlation
W. Zhang, W. Yu, Z. Wang, Z. Yu, R. Jiang, J.
Xiong
To be presented on DATE2008
2
Outline

• Introduction
• Preliminary
• Statistical Capacitance Extraction
• Chip-Level Capacitance Extraction Considering
  Spatial Correlation
• Numerical Results
• Conclusion

3
Process Variations

• Become an issue in 90nm technology and beyond
• Systematic
• Pattern-dependent
• Modeled with deterministic methods
• Random
• Need stochastic modeling
• Challenges to computational efficiency
• Monte-Carlo simulation
• Involves thousands of stochastic samplings
• Suffers from huge computational time (converging
  rate )
• Benchmark approach

Photo from Synopsys GLS-VLSI06
4
Existing Methods

• Recently proposed approaches
• FastSies ICCAD05 rough surface, non-sampling,
  SBIE
• Perturbation ICCAD05 quadratic model of C,
  Taylors expansion on potential matrix and
  solution
• Spectral Stochastic Collocation Method DATE07
  HPC technique, higher accuracy than
  perturbation, efficient techniques for solving
  potential matrix and variable reduction
• Limitations of Perturbation SSCM
• Model the fluctuation of each surface panel
  (large variable k)
• Time ? k2 ? time of running 3-D field solver
• Small structures variation model for rough
  surface

5
Our Contribution

• Chip-level capacitance extraction
• Considering fluctuation of each panel may not be
  necessary
• Window-based method, covariance among windows
  needed
• How to get the statistical capacitance of a
  critical path
• Contributions
• Simple variation model
• Intra-window algorithm
• Capacitance covariance among windows
• Statistical method for full-path extraction
• 100x or more faster than MC simulation

6
Outline

• Introduction
• Preliminary
• Grid-Based Variation Model
• Homogenous Chaos Expansion
• Statistical Capacitance Extraction
• Chip-Level Capacitance Extraction Considering
  Spatial Correlation
• Numerical Results
• Conclusion

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Grid-Based Variation Model

• Described in TCAD07
• Random variables
• Width, thickness, spacing, ILD thickness
• Grid model and spatial correlation
• In each cell each physical parameter has an
  unique value
• Among cells characterized by a correlation
  matrix
• Gridding scheme depends on
• Knowledge of manufacturing
• Error tolerance

Uniform grids Nonuniform grids
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Homogenous Chaos

• Homogenous chaos expansion for stochastic
  function
• Hermite polynomials are for Gaussian random
  process
• The orthogonality of Hermite polynomials

9
Homogenous Chaos

• HCE converges for any Gaussian random process
  with finite second-order moments
• HPC has optimal convergence rate for a Gaussian
  random process SIAM-JSC02

The Askey Scheme
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Outline

• Introduction
• Preliminary
• Statistical Capacitance Extraction
• Hermite Polynomial Collocation (HPC) Method
• Variable Preprocessing
• Chip-Level Capacitance Extraction Considering
  Spatial Correlation
• Numerical Results
• Conclusion

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HPC Method

• Hermite polynomial expansion of capacitance
• Perform Galerkin method with M polynomials

Computing time K times of conventional
capacitance extraction, independent of solver
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Sparse Grid Quadrature

• A technique to reduce collocation points for
  quadrature
• Level k grid has 2k1 degree of exactness
• One-dimensional quadrature (Gaussian quadrature)
• Collocation point set k1 points
• d-dimensional quadrature
• Point set
• About 2d points for level 1 accuracy, 2d2 for
  level 2
• Weights

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HPC with Sparse Grid

• Solve with sparse grid
• Conclusion sparse grid with level k accuracy
  required for order k expansion of capacitance

Order k expansion
C and ?j at most order k
C?j at most order 2k
Need level k grid for 2k1 degree of exactness
For quadratic capacitance model, sparse grid
with level 2 accuracy is needed, that means 2d2
collocation points for numerical quadrature
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Some Acceleration Techniques

• If the number of variable (quadrature dimension)
  is small, Sparse Grid may have more collocation
  points than the Gaussian quadrature
• In this case, we use Gauss quadrature instead
• There are duplicate points with different weights
  
• Consider it to reduce calls of capacitance
  extraction
• If 3-D capacitance extractor with iterative
  solver is used, minimum spanning tree of
  collocation points is constructed
• Employing the preceding solution as the initial
  guess of iterative solver can speedup the next
  capacitance solution

15
Variable Preprocessing

• HPC requires independent random variables
• For an intra-window extraction, the variables may
  be not independent if several variation cells are
  involved
• Get independent variables with Cholesky
  factorization
• A simple example

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Summary Intra-Window Extraction

• Algorithm Intra-Window Capacitance Extraction
  (Wi)
• 1. Preprocess variables inside Wi
• 2. Calculate collocation points pj
• 3. For each pj
• 4. Solve desired capacitances in Wi at pj
• 5. For each desired capacitance Ckl
• 6. Evaluate coefficients in
• 7. Evaluate mean and variance with

Can be done by any solver
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Outline

• Introduction
• Preliminary
• Statistical Capacitance Extraction
• Chip-Level Capacitance Extraction
• Window and Grid Partition
• Inter-Window Covariance
• Full-Path Capacitance Extraction
• Numerical Results
• Conclusion

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Window and Grid Partition

• Sophisticated techniques are actually used for
  window partition and capacitance assembling
• Because we focus on the variation-aware
  extraction, assume a simple partition and
  assembling technique
• Extraction windows and variation grid
• The setting of extraction windows depend on
  balancing the accuracy and efficiency
• Variation grid depends on manufacturing process
  and accuracy tolerance
• They have different strategy, and a window may
  involve several variation grid cells

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Inter-Window Covariance

• For any two windows i and j
• Firstly consider the covariance between variables
• Reverse the preprocessing step to have physical
  parameters

Transformed to covariance between functionals
Check out from the grid-based variation model
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Covariance between functionals

• Level-0 functional has 0 covariance with any
  other
• Other functionals in the quadratic model produce
  the following covariance pairs

All converted to the covariance between variables
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Covariance between functionals, proof

• Problem Derive
• Solution Correlation matrix of
• Perform Cholesky decomposition

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Computational Complexity

• Most covariance between functionals are 0.
• Only O(MiMj) calculations are needed, if a
  window does not include many grid cells
• Not many window pairs need to be considered,
  because the correlation coefficient decays to
  about 10-4 at distance 3?
• Ignore far window induceslittle error

Correlation coefficient
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Full-Path Capacitance Extraction

• We consider simple capacitance assembling
• Just sum the capacitances from related windows
• Mean of total capacitance
• Variance of total capacitance
• Explicit quadratic form or PDF
• Get the independent variable
• PFA may be need to reduce variable
• Obtain PDF with the technique of characteristic
  function ICCAD05

C14
C13
C12
C11
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Summary Full-Path Extraction

• Algorithm Full-Path Capacitance Extraction
• 1.Partition windows for capacitance extraction
• 2.For each window Wi do
• 3. Run Intra-Window Extraction(Wi)
• 4.For each critical net k with related window set
  Wk
• 5. Utilize the capacitances for windows in Wk
  to calculate the full-path capacitance.

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Outline

• Introduction
• Preliminary
• Statistical Capacitance Extraction
• Chip-Level Capacitance Extraction Considering
  Spatial Correlation
• Numerical Results
• Conclusion

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Experiment 1

• FastCap 2.0 is used to extract intra-windowcapaci
  tances with samplings of geometry
• Experiments run on a Sun server with 750MHz CPU
• The first case
• 2 conductors 1?1?40um each, with spacing 2um
• 10 windows(each 1?1?4um)
• Variation grid and window partition have
  coincide boundary
• Variation sources one thickness, two widths
• Standard deviation0.2um

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Exp 1, Results

• 10,000 Monte-Carlo simulations 13293s

Model Quadrature Points Time(s) Total Cap Err. Total Cap Err. Coupling Cap Err. Coupling Cap Err.
Model Quadrature Points Time(s) Mean Std Mean Std
Linear 7 9.34 -0.10 -1.00 -0.06 -1.31
Quadratic 25 33.5 -0.03 -0.66 0.04 -0.70
Capacitance variance is largely underestimated if
ignore the inter-window correlation
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Experiment 2

• Overlapped grids and windows
• variable in each window increases from 3 to 6
• Speedup to Monte-Carlo simulation is still gt 100
• Due to increase of variable, computational time
  increases by 2.0 and 3.8 times
• Up to now, the linear model show enough accuracy
• The following experiment shows the necessity of
  quadratic model

Model Quadrature Points Time(s) Total Cap Err. Total Cap Err. Coupling Cap Err. Coupling Cap Err.
Model Quadrature Points Time(s) Mean Std Mean Std
Linear 13 19.2 -0.12 -0.90 -0.10 -1.74
Quadratic 85 126 0.06 -0.44 0.06 -0.32
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Experiment 3 4

• Choose spacing as the only variation source
• Significant advantage of quadratic model
• A practical large case
• width, height, ILD thickness, spacing
• 8 normal window and 1 shift widow

Model Points Time(s) Total Cap Err. Total Cap Err. Coupling Cap Err. Coupling Cap Err.
Model Points Time(s) Mean Std Mean Std
Linear 2 2.67 0.04 -3.45 0.08 -3.09
Quadratic 3 3.97 -0.02 -0.69 -0.07 -0.83
Model Points(normal) Points(shift) Time(s) Speedup to MC Mean Err. Std Err.
Linear 13 21 251 718 0.01 -1.89
Quadratic 85 221 1803 100 -0.07 -0.83
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Outline

• Introduction
• Preliminary
• Statistical Capacitance Extraction
• Chip-Level Capacitance Extraction Considering
  Spatial Correlation
• Numerical Results
• Conclusion

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Conclusion

• A practical framework for chip-level capacitance
  extraction considering spatial correlated
  variations
• An efficient HPC technique is presented for
  extract the statistical capacitances within the
  extraction window
• The formula for the covariance of capacitances
  from different windows is derived
• Efficient algorithm is proposed to calculate the
  statistics of full-path capacitance
• Numerical experiments show that the method is of
  high accuracy and more than 100x faster than the
  MC simulation