A Programmable Circuit Breaker

1
A Programmable Circuit Breaker

• David DAmico, David Lavigne,
• Tim Maynard and Tong Liu

2
Introduction

• With the rapid growth of FPGA in ASIC market, the
  security of FPGA becomes important.
• http//www.actel.com/products/rescenter/securi
  ty/docs/DesignSecurityPPT.pdf

3
An SRAM-based PFGA Electrical Level Attack

• A Virus by Creating High Currents Inside the
  Device
• Experimental platform Altera EPF8636ALC84-4
• Using NO Altera proprietary information
• Result rendering the device inoperable

• FPGA Viruses Ilija Hadzic, Sanjay Udani
  and Jonathan M Smith
• University of Pennsylvania www.cis.upenn.edu/bo
  osters/fpgavirus.ps

4
Project Outline

• Initiate the attack
• Design a current comparator circuit
• Break circuit and recover from attack
• Design and implementation generalization

5
Initiate The Attack

• Goal modify the compiler output file (the device
  configuration data) to create internal logic
  conflicts
• FLEX 8000 Programmable Logic Device Family Data
  Sheet http//www.altera.com/literature/ds/dsf8k.pd
  f
• Configuring FLEX 8000 Devices
• http//www.altera.com/literature/an/an033.pdf
• Tool Configuration device( Verilog?)

6
A Current Comparator Circuit

• Compare the input current with a reference
  current and produce the result of comparation as
  a voltage-mode output
• http//vsp2.ecs.umass.edu/icdg/publications/pdffil
  es/thesis_defense/srsriniv_ms.pdf
• Goal Schematic, layout and testing of the
  functionality
• Tool Cadence, Hspice

7
aSoC Adaptive System on a Chip

• Built around a configurable system using the
  adaptive System-On-a-Chip Architecture
• http//www.ecs.umass.edu/ece/tessier/pact00.pdf
• Detail will follow when working with Dr. Andrew
  J. Laffely
• Tool Verilog

8
aSoC Preliminary Ideas

• Set input/output core ports to no-op
• While high current signal from comparator set
  input/output core ports to 11
• Reactive ports
• Interconnect Disabling
• Use valid bit as an enable for interconnect
  drivers
• Mentioned as a way to reduce power but can it
  work for us?

9
Generalization

• Why Comparing with software viruses, FPGA attack
  is completely new hardware damage could not be
  recovered without physically replacing the
  devices
• Have to be well understood if FPDAs are widely
  used
• Attack Detection and Prevention need to been
  considered during design, especially for the
  SRAM-based FPGAs.
• http//www.actel.com/products/rescenter/security/
  docs/DesignSecurityPPT.pdf

10
Related URLs

• Professor Wayne Burleson and Professor Russ
  Tessier
• http//www.ecs.umass.edu/ece/vspgroup/burleson.htm
  l
• http//www.ecs.umass.edu/ece/tessier/tessier.html
• Current Comparator http//vsp2.ecs.umass.edu/icd
  g/publications/
• aSOC interface http//vsp2.ecs.umass.edu
  /vspg/ASOC/index.html
• Links related to FPGA
• http//www.ecs.umass.edu/ece/fpga2002/
• http//www.cs.berkeley.edu/randy/Courses/CS150.F0
  0/Lectures/11-FPGAs.ppt
• http//www.eecg.toronto.edu/jayar/pubs/brown/surv
  ey.html
• http//www.vcc.com/fpga.html
• http//www.ee.washington.edu/faculty/hauck/publica
  tions/oxford.pdf
• http//bwrc.eecs.berkeley.edu/Classes/IcBook/SLIDE
  S/slides11.ppt
• http//www.altera.com
• http//www.xilinx.com
• http//www.actel.com

11
The End

• Thank You!