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NAMP Group Overview

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Extensive work have been done on circuit level to reduce power ... Handel-C. Syntax similar to C. Reliable synthesis approach down to FPGA and ASIC ... – PowerPoint PPT presentation

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Title: NAMP Group Overview


1
NAMP Group Overview
  • Presented by Charlie Zhong
  • February 22, 2002

2
Protocol Stack
3
What are we at?
  • Extensive work have been done on circuit level to
    reduce power
  • A lot of juice can be squeezed in protocol stack
  • We are after a system design

4
People in NAMP group
NAMP
Application
Jan Rabaey
Dragan Petrovic Rahul Shah
Network
Chunlong Guo Tufan C. Karalar En-Yi Lin Xu
Mei Chris Savarese Charlie Zhong
Data Link
5
Application
  • Driver building environment control
  • A centralized application
  • No peer-to-peer communications

Controller
Sensors
6
Network
  • Probabilistic routing in of hops
  • Class and location based addressing
  • Proactive flooding

7
Data Link Layer
Error control
Power control
MAC
Local address
Location
Power management
8
Positioning
  • Hop Terrain Algorithm
  • Count of hops from anchor nodes
  • Triangulation using 4 anchor nodes
  • No need RSSI, insensitive to TX power
  • No need ID
  • Initialization flooding
  • Maintenance periodic flooding

9
Positioning Subsystem
  • Results available to other layers as (x,y,z)
    coordinates, accompanied by confidence metric
  • 1 operating mode, occurs at application-specific
    period
  • All anchors initiate network-wide flood of packet
  • (x,y,z) of anchor, hop count, hop distance
  • 10 bytes total? Still doing precision tests
  • Each node propagates packet with hop count1
  • Each node performs triangulation computation
  • Total cost per node O(a3), a number of anchors

Source Chris
10
Positioning Subsystem Requirements
  • Only requires 1-hop communication per node
  • Does not require unique ID
  • Does not require priority processing time
  • Can be buffered and stalled for as long as nodes
    are relatively stationary
  • Uses addition, subtraction, multiplication,
    divide
  • Working on fixed-point implementation details
  • Characterizing accuracy as function of precision
  • Expecting to find 16-bit fixed point sufficient

Source Chris
11
Error control
  • CRC ARQ
  • Error delectability

Source En-Yi
12
Comparison of CRC codes
Source En-Yi
CRC-8, max number of retransmissions
5 Multi-level reliability CRC-4 for shorter
packets
13
Average number of transmissions
r max of transmissions
Source En-Yi
14
Packet Format
  • Data packet

S (x,y,z)
length
type
S_addr
D_addr
seq
retry
DLL OH
Network OH
PHY OH
Sync
delimiter
CRC
  • Control packets

ACK
length
type
S_addr
D_addr
seq
Session setup
Type
S_addr
D_addr
15
MAC
Channel 0 CSMA and random back off
Network broadcast message Most Data link layer
messages Location flooding
Traffic source
Channel 1 Dedicated
Network unicast data packets
Traffic source
16
Power Management
TX0
Option 1
RX0
RX1
Average power per node is about 3mW
TX0
Option 2
RX0
RX1
Average power per node is about 0.6mW
17
Broadcast in option 2
T
TX
RX_1
RX_2
RX_N
Good when the broadcast packets are rare
18
Power Control
  • TX power has small impact on average power
    consumption
  • Power control is mainly for connectivity
  • Placing nodes within range (option 1)
  • Simple, no OH
  • Fixed TX power level (0dBm)
  • Adaptive power control (option 2)
  • Can try out our new algorithms
  • Radio needs to support multiple power levels

19
DLL v.s. PHY Interface
PHY
DLL
TX REQ
TX on
TX data
RX on
RX data
Set channel
Channel number
Channel status
Carrier sense
Power on
20
Implementation
  • Protocol is currently being tested on test bed
  • Time to integrate it with our own radio and PHY
  • Initialization sequence

21
Feature Comparison
  • Handel-C
  • Syntax similar to C
  • Reliable synthesis approach down to FPGA and ASIC
  • Simulation environment not desirable
  • StateFlow
  • Finite State Machine
  • Highly desirable simulation environment w/
    Simulink
  • Synthesis using SSHAFT design flow down to ASIC.

Source Mei
22
Case Study
Source Mei
  • Implement the Initialization manager block in
    StateFlow
  • 7 states
  • 19 arcs
  • Medium complexity
  • Automatic synthesis using SSHAFT flow
  • 264 gates

23
Conclusion
  • We prefer to use StateFlow to implement DLL and
    MAC
  • Co-simulate with Physical layer in Simulink
  • Good direct synthesis path

Source Mei
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