EU Design Study

1
Digital Signal Analysis for BPMs

• The Project
• Measure beam trajectories and orbits in hadron
  machines
• Specific problems Varying revolution frequency,
  changing harmonic number
• The Principle
• Fast digitization, signal treatment on the
  flyusing FPGA and big memory

2
Block Diagram of Electronics
Fast Sampling ADC
S
RAM
?x
FPGA
PU
?y
controller
Communication to accelerator Control system
3
Digital Signal Analysis for BPMs
GSI SIS18
CERN PS
4
Project History (Pre-Phase)

• End 2003 First ideas, CERN contacts with
  Instrumentation Technologies (IT)
• Jan 2004 RD contract of CERN with ITdelivery
  of prototype Libera electronics (pre-version)
• GSI had similar plans, decided collaboration
• March 2004 Andreas Galatis as PhD student hired
  by GSI
• June 2004 CARE-HHH-Workshop on Hadron BPM signal
  treatment in Aumühle (Hamburg)
• Mid July 2004 Visit to IT (Jeroen Belleman,
  CERN)
• Measurements on CERN PS with fast ADC card PC

5
Project History (Pre-Phase) II

• Measurements on GSI SIS18 with fast ADC card PC
  
• Oct 2004 Collaboration Meeting GSI
  measurements with Libera and fast ADC PC
• Some problems on pre-version Libera were solved
  (trigger), some remained (memory access)
• Nov. 2004 Measurement on CERN PS, Libera
  pre-version works ok as fast chart recorder
• From Nov 2004 to now Data evaluation
  development of signal processing algorithms (base
  line correction, bunch synchronisation). This is
  done offline (C-programs)

6
Going on at the moment

• At CERN a market survey tender is needed in
  order to get acceptation by council.
• Continued work on offline signal processing
  algorithms at CERN and GSI in collaboration with
  TU Darmstadt
• First tests on implementation in the FPGA using
  VHDL simulation on measured data
• Hiring of a technical student (M. Stuckert) at
  CERN for the implementation work, hiring a
  technical engineer (K. Lang) at GSI.

7
Work Plan

• Next WP meeting mid-May in Slovenia (IT)
• Until October 2005 Refinement of algorithms,
  implementation in VHDL simulation, timing
  checks, interfacing to ITs VHDL code
• End 2005 Another measurement session using
  online signal treatment at GSI (2006 CERN)
• (CERN) Tender for acquisition of 50 digital
  treatment electronics cards/boxes.
• 2006 Definition of data layout in memory,
  interfacing to the accelerator control system at
  CERN
• Installation and commissioning of final system at
  PS