Microprocessors I

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Microprocessors I

• Time Sundays Tuesdays 0730 to 845
• Place EE 4 ( New building)
• Lecturer
• Bijan Vosoughi Vahdat
• Room VP office, NE of Uni
• Office Hours After 16 please
• Vahdat_at_sharif.edu
• http//sharif.edu/vahdat
• Phone [phone]
• Fax [phone]

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Grading Policy

• Homework 15
• Subject UPI2009HWXIDxxxxxxxx
• Quiz 10
• Mid-term Exam 25
• Final Exam 25
• Final Project 25
• Presenting New Materials on Microprocessors 5
• Paper Discussion 5

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Resources

• Microprocessors and Interfacing Douglos V. Hall
• 5 Volumes from Intel - Intel 64 and IA-32
  Architectures - Software Developers Manual
• 1 Basic Architecture
• 2A Instruction Set A-M
• 2B Instruction Set N-Z
• 3A, 3B System Programming Guides

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Reference Book
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Table of Contents

• Computer Number Systems, Codes, and Digital
  Devices
• Computers, Microcomputers, and Microprocessors
  An Introduction
• 8086 Family Assembly Language ProgrammingIntroduc
  tion
• Implementing Standard Program Structures in 8086
  Assembly Language
• Strings, Procedures, and Macros
• 8086 Instruction Descriptions and Assembler
  Directives
• 8086 System Connections Timing, and
  Troubleshooting
• 8086 Interrupts and Interrupt Applications
• Digital Interfacing (PPT )
• Analog Interfacing and Industrial Control (D/A
  A/D DSP)
• Dma, Drams, Cache Memories, Coprocessors, and Eda
  Tools
• C, a High-level Language for System Programming
• Microcomputer System Peripherals (Keyboard
  Display HDD Printer)
• Data Communication and Networks ( Async Sync
  LAN - GPIB)
• The 80286, 80386 and 80486 Microprocessors
• An Introduction to the Pentium Processors (New
  Edition)

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Covered by 5 Volums

• Pentium processors
• P6 family processors
• Pentium 4 processors
• Pentium M processors
• Intel Xeon processors
• Pentium D processors
• Extreme Editions
• 64-bit Xeon processors
• CoreTM Duo processor
• CoreTM Solo processor
• Dual-Core Xeon LV
• Xeon processor 3000, 3200
• Xeon processor 5000

• Intel CoreTM 2
• Duo processor
• Quad Q6000 series
• Extreme X7000 and X6800
• Extreme QX6000
• Extreme QX9000 - X9000
• Quad Q9000 series
• Duo E8000, T9000
• Intel Xeon 5100, 5300 series
• Intel Xeon processor 7100
• Intel Pentium Dual-Core
• Xeon processor 7200, 7300
• Xeon 5200, 5400, 7400
• AtomTM processor family
• Intel CoreTM i7 processor

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History 1/4

• 1971 4004 4bit, 4K, 50KIPS
• 1972 8008 8bit, 16K
• 1974 4040 Like 4004, Higher speed
• 1974 8080 Like 8008, 64K, TTL
• 1977 8085 Updated 8080, 246 Instr.
• 1978 8086 Architecture from 8080
• 1979 8088
• 1980 8087 Floating-point coprocessor
• 1981 80286 extended the 8086 (16M) 1st Fully
  Compatible with its predecessor

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History 2/4

• 1985 80386 32 bits data
• 1989 80486 Containing Coprocessor
• 1992 Pentium Superscalar Architechture
• 1995 Pro 4 Instructions added to 386
• 1997 PentiumII with MMX Technology
• 1998 Pentium II Xeon
• 1999 Celeron PPGA
• 1999 Pentium III
• 2000 2006 Pentium 4 Processor Family
• 2001- 2007 Xeon Processor

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History 3/4

• 2003-Current Pentium M Processor
• 2005-2007 Pentium Processor Extreme Edition
• 2006-2007 The Intel Core Duo and Intel Core
  Solo Processors
• 2006-Current The Intel Xeon Processor 5100,
  5300 Series and Intel Core2 Processor Family

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History 4/4

• 2007-Current The Intel Xeon Processor 5200,
  5400, 7400 Series and Intel Core2 Processor
  Family
• 2008-Current The Intel Atom Processor Family
• 2008-Current The Intel Corei7 Processor Family

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Intel 4004

• 4 bit microprocessor
• 4KB of memory
• 45 instructions
• 50 KIPS(Kilo-instructions per second)
• Main problems
• Speed
• word width
• memory size

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8086 / 8088

• 16-bit microprocessor
• 2.5 MIPS
• 1MB of memory
• A small 4- or 6-byte instruction cache or queue
• Over 20,000 variations of instructions
• The popularity of the Intel family ensured in
  1981 by IBM

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80386

• 275,000 transistors
• Intels first practical 32-bit microprocessor
• 32-bit data bus and memory address
• 4GB of memory
• Memory management unit
• Multitasking

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Pentium

• P5 architecture / 80586
• Introductory version 60MHz and 66MHz, 110MIPS /
  100MHz, 150MIPS
• 16KB of cache size (8KB IC, 8KB DC)
• 4GB of memory system, 64-bit data bus
• Executes up to two instructions at a time (If
  they dont conflict!)

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P5 Architecture
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Pentium Pro Processor

• P6 architecture
• 5.5M Transistors, 3 integer units, floating-point
  unit
• Basic clock frequency 150 MHz and 166MHz
• 16K L1 Cache(8K for data and 8K for instructions)
  256K L2 Cache
• Execute up to three instructions at a time (It
  doesnt matter even if the conflict!)

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P6 Architecture
Three-way Superscalar, pipelined architecture
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P6 Architecture
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Pentium II Processor

• P6 architecture
• 7.5M Transistors
• Initially ran at 233MHz and 266MHz
• 32KB L1 Cache 512KB L2 Cache (External ? 50 of
  processor speed)
• Arranging the amount of L2 Cache ? Celeron(1999)
  or Xeon(1998)

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Pentium III Processor

• P6 architecture
• 9.5 Million transistors
• 450 and 500 MHz
• SSE(Streaming SIMD Extensions) instructions
• Improved L1 cache controller
• Low-end Celeron / High-end Xeon

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Pentium 4 Processor

• NetBurst architecture
• Deep instruction pipeline, SSE2, 64-Bit floating
  point computation
• 42 Million transistors, 1.4 GHz and 1.5 GHz
• Hyper Threading

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Pentium M Processor

• M for Mobile Laptop
• Execution core of the Pentium III Pentium 4
  compatible bus interface
• Improved instruction decoding/issuing front end
  improved branch prediction SSE2 support
• a much larger cache
• Low average power consumption, Lower heat output
  than desktop

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The Intel Corei7 Processor

• support Intel 64 architecture
• Based on Intel micro-architecture (Nehalem) using
  45 nm process technology.
• Intel Turbo Boost Technology converts thermal
  headroom into higher performance.
• Intel HyperThreading Technology in conjunction
  with Quadcore to provide four cores and eight
  threads.
• Dedicated power control unit to reduce active and
  idle power consumption.

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The Intel Corei7 Processor

• Integrated memory controller on the processor
  supporting three channel of DDR3 memory.
• 8 MB inclusive Intel Smart Cache.
• Intel QuickPath interconnect (QPI) providing
  point-to-point link to chipset.
• Support for SSE4.2 and SSE4.1 instruction sets.
• Second generation Intel Virtualization
  Technology.