Introduction to PowerPC Assembly

1
Introduction to PowerPC Assembly

• CprE 211
• Spring 2007

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Assembly and Machine Instructions

• PowerPC machine instructions
• Each instruction is 32-bit (4-byte) long
• Instructions are divided into fields
• Example ADDI r1, r2, 64
• Let op-code 14, D 1, A 2, IMM 64(ADDI
  Add a register and an immediate)

op-code
D
A
IMM
5-bit
16-bit
5-bit
6-bit
3
Assembly and Machine Instructions

• Assembler Translate assembly program into object
  code
• Translate assembly instruction with binary
  machine instruction
• Translate data declarations into data memory
  binary format
• Translate labels into addresses/symbols

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Assembly and Machine Instructions

• Mnemonic forms of 32-bit machine instructions
• Common forms opcode rD, rA, rB opcode rD, rA,
  IMMbxx label
• Additional supports for
• Pseudo instruction
• Labels
• Directives
• Others

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Assembly and Machine Instructions

• Typical instruction types
• Integer load and store
• Integer arithmetic, compare, logic and shift
• Floating point load and store
• Float point arithmetic, compare, logic,
• Branch instructions
• Miscellaneous e.g. system calls

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PowerPC Registers

• General purpose registers (GRP)
• 32 32-bit registers r0 to r31
• Register usage
• Dedicated data area anchor, stack pointer
• Volatile Caller save
• Nonvolatile Callee save
• Floating point registers
• 32 64-bit registers fr0 to fr31

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PowerPC Registers

• Register R0 is different from R1-R31
• Sometimes it is zero
• addi r1, r0, 100 r1 lt 100
• Sometimes it holds a real value
• add r0, r3, r4
• sub r5, r5, r0

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PowerPC Registers

• Condition Register (CR)
• Conditions of integer arithmetic operations
• Floating Point Status and Condition Register
  (FPSCR)
• Conditions of integer arithmetic operations

• Integer Exception Register (XER)
• Overflow and carry bits
• Link register (LR)
• To hold return address
• Count register (CTR)
• To hold loop count (associated with special
  branch instructions)

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Load and Store

• Move data between registers and memory
• Load or store
• Read or write memory?
• Data size
• To read/write one byte, two bytes, or a whole
  word?
• Extension
• Register is always 32-bit (for 32-bit MPC555)
• Extend data as signed or unsigned number?
• Addressing mode
• How is the address given?

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Load and Store

• Assume r3 0x20000000
• mem(0x20000200) 0x12345678 (big endian)
• Load byte with zero extension
• lbz r5, 0x200(r3) r5 0x00000012
• lbz r5, 0x201(r3) r5 0x00000034
• Load half word with zero extension
• lhz r5, 0x200(r3) r5 0x00001234
• lhz r5, 0x202(r3) r5 0x00005678
• Load word with zero extension
• lwz r4, 0x200(r5) r4 0x12345678

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Load and Store

• Memory addressing mode how to calculate
  effective address (EA)
• Displacement EA base register value offset
  (displacement)
• lwz r4, 0x1000(r3) EA r3 0x1000
• Register Indexed EA base register value index
  register value
• lwzx r5, r3, r4 EA r3 r4
• Suffix x represents register indexed

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Load and Store

• How to fill a register when a byte or half-word?
• A register is always 32-bit for MPC555
• Zero extension Fill the leftmost bits with zeros
• Algebraic extension Fill the leftmost bits with
  the sign bit value

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Load and Store

• Algebraic extension use a suffix
• Assume r3 0x20000000 and mem(0x20000200)
  0x87654321 (big endian)
• Load byte with algebraic extension
• lba r5, 0x0200(r3) r5 0xFFFFFF87
• lba r5, 0x0202(r3) r5 0x00000043
• Load half word with algebraic extension
• lha r5, 0x0200(r3) r5 0xFFFF8765
• lha r5, 0x0202(r3) r5 0x00004321

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Load and Store

• Which load instructions should be used to load m
  and n?
• short m
• unsigned short n

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Load and Store

• Suppose r3 0x20000000, r4 0x00001000
• mem(0x20001000) 0x87654321 (big-endian)
• What will be the value in register r3?
• lbz r5, 0x1000(r3)
• lba r5, 0x1000(r3)
• lhzx r5, r3, r4
• lhax r5, r3, r4

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Load and Store

• Store instructions
• Three data sizes byte, half-word, word
• Two addressing modes displacement or register
  indexed
• No extension issue
• Examples
• stb r5, 0x1000(r3)
• sth r5, 0x1000(r3)
• stwx r5, r3, r4

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Integer Arithmetic and Logic

• Common arithmetic operations add, subf, neg,
  mul, div
• Common bitwise logic and, or, xor, nand
• Examples
• add r5, r3, r4 r5 r3 r4
• subf r5, r3, r4 r5 r4 - r3
• or r5, r3, r4 r5 r3 r4
• Check PowerPC manual for others

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Integer Arithmetic and Logic

• Use immediate operands Add i suffix
• Examples
• addi r5, r3, 100 r5 r3 100
• addi r5, r0, 200 r5 0 200 200
• ori r5, r3, 0x1 r5 r3 r4
• How large can the immediate operand be?

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Integer Arithmetic and Logic

• Every instruction is encoded into 32-bit binary
• op rD, rA, IMM (arithmetic/logic with one
  immediate)
• op rD, d(rA) (load/store using displacement)
• op rD, rA, rB (arithmetic/logic using three
  registers)
• op rD, rA, rB (load with register indexed)
• op rS, rA, rB (store with register indexed)

op-code
D
A
IMM/d
5-bit
16-bit
5-bit
6-bit
op-code
D/S
Other bits
A
B
5-bit
5-bit
5-bit
11-bit
6-bit
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Integer Shift Operations

• Logic and arithmetic shifts
• slw shift left word
• srw shift right word
• sraw shift right algebraic (arithmetic)
• Examples
• slw r5, r3, r4
• sraw r5, r3, r4
• slwi r5, r3, 1

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Branch Instructions

• Branch condition
• Use conditions in the CR register
• Branch Target address
• The branch target used to fill PC if the branch
  is taken

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Branch Instructions

• Condition register CR
• Four condition bits
• LT Less than zero?
• GT Greater than zero?
• EQ Equal zero?
• SO Summary of Overflow

eight fields, 32-bit
4-bit
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Branch Instructions

• How to set condition?
• Compare words
• cmpw rA, rB
• cmpwi rA, IMM
• In CR0
• LT 1 if rA lt rB
• GT 1 if rA gt rB
• EQ 1 if rA rB
• (SO dont care now)

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Branch Instructions

• Compare unsigned signed words (compare logical)
• cmplw rA, rB set CR0 for unsigned
  comparison of rA and rB
• cmplwi rA, IMM use immediate value

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Branch Instructions

• Use LT, GT, EQ, SO bits in condition register
• bxx target
• Examples
• blt target branch taken if LT 1
• bgt target branch if GT 1
• beq target taken if EQ 1
• ble target taken if GT 0
• b target unconditional branch

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Branch Instructions

• C Program
• if (x gt y)
• z 1
• else
• z 0

• cmpw r3, r4
• ble else
• addi r31, r0, 1
• b done
• else
• addi r31, r0, 0
• done

• Notes
• Revised from CodeWarrior disassemble
• x ? r3 y ? r4 z ? r31
• li r31, 1 gt addi r31, 0, 1 li called simplified
  mnemonic (pseudo-instruction)

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Constant and Absolute Address

• Each instruction is only 32-bit how to handle
  32-bit constants?
• Solution Use addis and ori
• addis add immediate shifted by 16-bit
• ori or immediate
• Example Place 0x20001000 into R3
• addis r3, r0, 0x2000 r3 0x20000000
• ori r3, r3, 0x1000 r3 0x20001000

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Constant and Absolute Address

• Pseudo instructions
• Instructions that do not represent native machine
  instructions
• load immediate
• li rA, IMM addi, rA, r0, IMM
• load immediate and shift by 16-bit
• lis rA, IMM addis, rA, r0, IMM

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Constant and Absolute Address

• How to set up a 32-bit address?
• char pDIPSwitch1 (char ) 0x4000000B
• pDIPSwitch1 0x0F
• PowerPC Assembly

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PowerPC Assembly Exercise

• Exercise Simple assignments
• Use _a, _b as the address of a and b
• a b
• a 10

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PowerPC Assembly Exercise

• Answer a 10
• assume a is of int type
• r3 to hold 10
• li r3, 10 set up the value
• lis r0, _a_at_h set up base addr
• stw r3, _a_at_l(r0) store a

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PowerPC Assembly Exercise

• Exercise Arithmetic Expressions
• c a b
• e (a b) (c d)

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PowerPC Assembly Exercise

• Answers c a b
• assume a, b, c are of int type
• r3 a, r4 b, r5 c
• lis r0, _a_at_h set up base addr
• lwz r3, _a_at_l(r0) load a
• lis r0, _b_at_h set up base addr
• lwz r4, _b_at_l(r0) load b
• add r5, r3, r4 a b
• lis r0, _c_at_h set up base addr
• stw r5, _c_at_l(r3) store c

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PowerPC Assembly Exercise

• Exercise If statement
• if (x gt y)
• max x
• else
• max y
• Write goto version
• Translate into PowerPC assembly

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PowerPC Assembly Exercise

• Exercise Calculate the parity bit of n
• m n
• parity 0
• do
• parity (m 1)
• m gtgt 1
• while (m ! 0)

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PowerPC Assembly Exercise

• Exercise Calculate the sum of XN
• sum 0
• for (i 0 i lt N i )
• sum Xi
• Write goto version
• Translate into PowerPC assembly