SKADS and SKA

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SKADS and SKA

• Andrew Faulkner

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Aperture Arrays are Important to the SKA
Performance
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SKA Science Requirements
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SKA Memo 100
WBF Dense AA
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SKA Structure
Mass Storage
0.3-1.0 GHz Wide FoV
Central Processing Facility - CPF
Dense AA
Digital Signal Processing
To 250 AA Stations
...
Correlator AA Dish
16 Tb/s
Data
...
..
70-450 MHz Wide FoV
..
Time
Post Processor
Control
Sparse AA
...
0.8-10 GHz
DSP
Control Processors User interface
12-15m Dishes
80 Gb/s
DSP
Time Standard
...
To 2400 Dishes
User interface via Internet
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Demonstrator EMBRACE
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Demonstrator 2-PAD
Signal Conditioning Rack
Processing Rack
External Analogue only
Clock distribution
Mid-Plane
Backplane
Bunker wall
I/F Board
I/F Board
10Gb links
Memory
Cyclops Processor
FPGA
ADC
FPGA Digital Pre- processor
Antenna Array
PSU
LNA
Analog Cond.
Digital acquisition
Beamforming processing

Reg
Coax
I/F Board
I/F Board
Memory
HSS links
ADC
FPGA Digital Pre- processor
Cyclops Processor
FPGA
PSU
Gain Drive
Distribu- tion
Cat-7
Power supplies
Power supplies
Control System
Cooling Systems
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Demonstrator BEST
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Challenges

• Cost
• Processing ability, power requirements and cost
• Digitisation implementation
• Internal external communication data cost
• Ability to perform back-end processing

• Technical
• Reducing Tsys
• Limiting self-induced RFI
• Mass manufacturing
• Reducing systematics Dynamic
  Range!
• Calibration methodology
• Environmental heat, bugs, lightening etc

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Deliverables (just DS3 and 4!)
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Deliverables (just DS3 and 4!)

• DS3-T1
• 1. Report on COTS technology for data links
• 2. Report on component-based technology for data
  links
• 3. Prototype phase transfer links over various
  span lengths
• 4. Report on performance of phase transfer system
  over real installed fibre links
• 5. Report on prototype data links over short and
  long spans
• 6. Detailed cost models for COTS and
  component-based data applicable to various
  network and processing architectures
• DS3-T2
• 1. Processing architectural design documents
• 2. Software design documents
• 3. Cost and power usage evaluations for the
  various processing architectures
• 4. Cost evaluations for the software architecture
  
• 5. Technology assessment and road mapping
  overview reports

DS4-T1 1. Establish benchmark LNA simulations to
provide performance feedback for device process
development 2. RF on wafer (RFOW) measurements on
device wafers fabricated 3. Design, fabrication
and testing of SiGe band pass filter using PIC
Technology 4. LNA design techniques simulation
study 5. ADC Design rule established and
recommend ADC architectures 6. ADC building
blocks design, fabrication and performance 7.
Design, manufacture and test of hybrid LNA using
novel discrete devices developed in programme
(two iterations) 8. Fabricate and test Integrated
ADC circuits 9. Fabricate and test of advanced
integrated interconnect technologies with Si and
GaAs technologies. 10. Fabricate and test
further LNA technologies iterations 2 and 3
11. Fabricate and test further ADC technologies
- iterations 2 and 3 12. Final report on
different semiconductor technologies
DS4-T2 1. Wide band, high dynamic range A/D
blocks 2. Digital Down Converters 3. Sizing of
the digital word at different levels of system
4. Low cost Poly-Phase filter banks 5. Data
distribution and synchronization 6. A
quasi-perfect reconstruction equi-spaced filter
bank DS4-T3 1. Develop RFI mitigation strategies
for the phased-array concept of SKA, at a station
level and for the instrument as a whole 2.
Assess the influence of these methods on data
quality 3. Assess the cost effectiveness of
these methods for the RFI environment of the
selected SKA site 4. Demonstrate practical RFI
mitigation techniques for the EMBRACE and BEST
SKADS demonstrators
All to be completed
DS4-T4 1. Wide band integrated antenna, dual
polarization 2. Low cost antenna technology 3.
Low cost packaging solutions 4. Low cost analogue
photonic link 5. Reports on all of the above
deliverables 6. Publications and PhD
thesis DS4-T5 1. Analogue beamformer in GaAs for
EMBRACE. 2. Prototype of a lower cost analogue
beam-former in Silicon (not in time for
EMBRACE.) 3. Prototype digital beamformer for
2-PAD. 4. Architecture design for the whole
digital beam-forming system for 2-PAD. 5. A final
report on the trade-offs and cost-effectiveness
of analogue and digital beam-forming systems.
DS3-T3 1. Initial report on conceptual issues
concerning the SKA network, data flow and
processing 2. Delivery of functional simulator 3.
Report on analysis of performance of the SKA
using the simulator DS3-T6 1. Spec. of a
prototype control and data processing system 2.
Specification and implementation of constructs,
interfaces and components 3. Platform specific
composition/deployment of control and data
processing software for several alternative
hardware platforms 4. assessment of the
readiness for scalabilit with MDA 5. rec.
guideline for scalable design and implementation
DS4-T6 1. Dual polarization all-digital tile 2.
Design documentation package for all-digital
tile 3. Test environment for prototype
all-digital tile. 4. Evaluation report of tile
performance. 5. Tile cost estimates projected for
SKA volumes and timescales. 6. Reliability
analysis report.
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Technology Readiness Levels
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Technology Readiness Levels
Ref NASA http//en.wikipedia.org/wiki/Technology_
Readiness_Level
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Design and Costing - 2
SKACost
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System Group

• Purpose Focussed advisory group to DS8 to
  prepare
• final SKADS report
• Timing Continue work from Design and Cost team
• Deliverable Core report and arguments for
  SKADS
• end March 2009
• Starting Autumn 2008
• Discussion With DS8 team

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System Group - Members

• Andrew Faulkner (Chair) Peter Wilkinson
• Steve Torchinsky Arnold van Ardenne
• Andre van Es Paul Alexander
• Dion Kant Stelio Montebugnoli
• Mike Jones Steve Rawlings
• Rosie Bolton Jan Geralt bij de Vaate

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DS8 Deliverables

• 1. Scientific and technical specification for the
  SKA (T047)
• 2. Overall System Design (T048)
• 3. Costing and budget assessment paying attention
  to the civil works required for the overall array
  to be included in the Preliminary SKA plan(T0 to
  T048)
• 4. Preliminary SKA plan including a study of
  funding sources (T048)
• 5. Square Kilometre Array White Paper to be
  submitted to the International SKA Steering
  Committee, to the EC and to the national funding
  agencies which contributed to SKADS (T048).