Programming the Z80 MPU

1
Programming the Z80 MPU To create a program that
will execute on the Z80 MPU, we need to know
several things. 1. The Programming Model which
includes The Instruction Set , Register Set and
the Addressing Modes . 2. The System Memory Map
- This gives information regarding the address
locations and sizes of the Memory (RAM ROM)
and the I/O devices
2
ROM contains program, constants, lookup
tables RAM contains variables and data
structures I/O Input Output device/s
location/s
3
3. The Development Tools to allow the creation
of a machine readable program 4. Finally, the
problem , a description program that we want to
implement. Once we have an idea of what we are
trying achieve, then we can design a program to
this. (MicroBook Page 100)
4
In the previous lectures we have introduced
the basic concepts of how a general MPU
operates. These next lectures will specifically
with the Z80 MPU. The lectures will introduce
the following 1. INSTRUCTION SET and ADDRESSING
MODES 2. INTRODUCTION TO ASSEMBLY LANGUAGE
5
Refresher MPU instructions are represented by
binary words. Each instruction has an unique
binary pattern. MPU executes program one
instruction at a time. ( FETCH DECODE EXECUTE )
6
(No Transcript)
7
MPU Instruction Set The MPU is only capable of
performing a limited number of instructions ,
this is its instruction set. Zilog Z80 MPU can
execute 158 different instructions types. The
types of instructions a MPU can perform may
be generally classified as follows
8
Instruction
Assembler Format
LD A, ( 1825H)
Data to use in the process
Operator Opcode
Operand(s)
Process to carry out
1825
Hex Code 3A
9
1. Data Transfer Operations 2. Arithmetic
Operations 3. Logical Operations 4. Program Flow
Control 5. Input - Output 6. Miscellaneous
10
Data Transfer LD A, 5 transfer constant data 5
into Accumulator LD HL, 1900 HL loaded with
1900H Arithmetic Operations ADD A,5 add
constant 5 to Accumulator SUB 5 subtract 5
from the Accumulator
11
Logical Operations OR 0FH bitwise OR of Acc
with constant 0FH AND 0FH bitwise AND of Acc
with constant 0FH Program Flow
Control JP Z,0200H JP NZ,0200H JP C,0200H JP
NC,0200H DJNZ 0200H THIS OPCODE USES
REGISTER B
12
(No Transcript)
13
Z80 Instruction Set Uses the following Categories
to group its operations Load and Exchange
Block Transfer and Search Arithmetic and
Logical Rotate and Shift Bit Manipulation
(Set, Reset, Test) Jump, Call, and Return
Input/Output Basic CPU Control
14
Addressing Modes Most Z80 Instructions operate
on Data stored in 1. Internal Registers (
A,F,B,C,D,E,H,L,SP, e.t.c.) 2. External Memory 3.
In I/O Ports For all these Data movement
operations, the instruction ( the op-code
operands) must contain information relating to
1. Source of Data (Is it Register,Memory or I/O
?) 2. Destination of Data (Register,Memory or I/O
?)
15
Instructing the MPU as to the Data source and the
Data Destination is called the ADDRESSING
MODE. MPU generally have a variety of ADDRESSING
modes The Z80 supports 10. The Instruction
Format is as follows
SPECIFIES DATA VALUES OR ADDRESS OF DATA
SPECIFIES OPERATION
16
The Z80 Instruction Set Contains Operations
described with the following 3 instruction
formats 1. Single Byte Op-code Only 2. Two Bytes
Op-code 1 Operand 3. Three Bytes
Op-code 2 Operands
17
Reading Mnemonic 16 Bit Load Operation
SRC
DEST
LD HL , DE
OPCODE OPERAND1 OPERAND2
DEST DESTINATION (Reg, Mem , I/O ) SRC
SOURCE (Reg , Mem , I/O )
18
Z80 Addressing Modes Ref. Microprocessor
Systems Chapter 3 Pg. 63 - 69 1. Register
Addressing (Implied, Implicit) Instruction
execution involves only contents of registers
for source and destination. No memory address
need be generated LD A,B LD
BC,DE SINGLE BYTE INSTRUCTION ADD
A,C FORMAT Special
Case OR 45 means OR ACC with 45
19
2. Immediate Addressing In this mode the data
required by the instruction is available
immediately the full instruction has been read.
2 BYTE and 3 BYTE INSTRUCTION FORMAT OPCODE
followed by DATA Byte(s). Data is often called
LITERAL,(meaning a quantity itself) LD B,34H
2 BYTE FORMAT OPCODE OPERAND ADD A,0EAH
LD BC,1850H 3 BYTE FORMAT
OPCODEOPR1OPR2 OR 02H
20
3. Direct Addressing (Also called Absolute) This
mode the instruction OP-CODE is followed by a 2
byte (16 bit) Address. The Address is the
exact address of the data item. The Address is a
constant since it is contained within
the program LD (1234),A IN A,(FA)
21
4.Indirect Addressing In this case the
instruction does not give the address directly
but instead the location of the address. This
location may be another memory location or a
register. If the location is in memory the
addressing mode is called Memory Indirect. If
the location is in a register it is called
Register Indirect. LD (HL),A ADD A,(DE)
22
5. Index Addressing Using Index Register an
Offset to Specify data Index registers IX and IY
(16 bit registers) LD A,(IX 0) address formed
from IX contents 0h 6. Relative Addressing In
this mode , the byte following the
instruction op-code specifies a 2s complement
displacement value. The 2s complement value is
added to the PC to enable forwards and backwards
jumps in the program.
23
1850 JR NZ,0FBH 1852 RST 38H 0FBH means
1111 1011 0000 0100
1s complement 0000 0101 2s
complement 5 DECIMAL FB -5
DECIMAL IF when executing the jr instruction the
Z is still set the PC counter will be altered to
jump back five places to location 184DH NB. The
PC will be pointing the next instruction
location 1852H , therefore 1852H - 5H
184DH
24
Why do we need different Addressing Modes ? Read
Discussion on Page 70. Register Addressing
Reduces external Bus access.
25
Introducing Assembly Language Programming The
section deals with the creation of programs that
will execute on the Z80. The programs will
initially be hand assembled. These result hex
numbers , representing the program will be
entered, by hand into MPU memory system. Later
development tools such as a PC based Z80
cross-assembler and Z80 simulator will be used to
develop and debug larger programs. The following
pages show a typical Z80 program with its
Listing and Hex Files.
26
org 0 jp start org 1800 start ld hl,1850
ld b,20 xor a loop ld (hl),a inc hl dec
b jr nz,loop rst 38 end
27
AS80 Assembler for i8080 1.31.
Page 1 ---------------------
------------ FIRST.ASM ---------------------------
------- 12 lines read, no errors in pass 1. 0000
org 0 0000 c30018
jp start 1800
org 1800 1800 215018
start ld hl,1850 1803 0620
ld b,20 1805 af xor a 1806
77 loop ld (hl),a 1807 23
inc hl 1808 05 dec b 1809
20fb jr nz,loop 180b ff
rst 38 No errors in pass 2.
28
03000000C3001822 0C1800002150180620AF77230520FBF
FC5 00000001FF