Lecture 4 Introduction to Power Estimation

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Lecture 4 Introduction to Power Estimation

• Signal Probability and Activity
• Parker-McCluskey algorithm
• Activity estimation with probability techniques
• Auto-correlation and spatial correlation issues
• Summary

• Michael L. Bushnell
• CAIP Center and WINLAB
• ECE Dept., Rutgers U., Piscataway, NJ

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Need for Power Estimation

• Average power determines battery life
• Switching current Pavg Vdd2 C f
• Short-circuit currents
• Leakage and sub-threshold currents
• Must qualify power consumption of design BEFORE
  it is fabricated
• Change design at multiple levels of abstraction
  if power consumption is excessive
• Aperiodic signals estimate f by
• Signal activity A average signal
  transitions/unit time
• Also measures electro-migration, and hence,
  reliability
• Must determine A for internal node signals and
  must estimate their capacitances

1 2
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Power Estimation

• Uses of power estimates
• High-level synthesis
• Logic synthesis
• Circuit synthesis
• Need to estimate glitching power
• Due to different delays in reconverging circuit
  paths
• Inertial logic gate delays can filter out
  glitches
• Represents 30 to 40 of the power wasted in
  arithmetic circuits

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Example of Glitching Power
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Flows for Power Estimation
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Signal Modeling

• View signal as a stochastic process g (t) t
  (- , )
• Takes values of 0 and 1, transitioning at random
  times
• Strict sense stationary if statistical properties
  invariant of a shift in the time origin
• Mean does not change with time
• If constant mean process has a finite variance so
  that g (t) and g (t t) are uncorrelated as t
  , called mean ergodic
• Decaying autocorrelation

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Signal Probability and Activity
T
1 2T

• Probability P (g) lim g (t)
  dt
• Activity A (g) lim
• ng (t) signal transitions of g(t) in interval
  (-T, T)
• Model circuit primary inputs as mutually
  independent mean ergodic 0-1 processes
• P (g) becomes constant, independent of time,
  called equilibrium signal probability
• A (g) becomes expected transitions / unit time
• a represents normalized signal activity (A (g) /
  clock frequency)

T

-T
ng (T) T
T

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Example Signal Probabilities
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Parker-McCluskey Signal Probability Calculation
Algorithm

• Inputs Signal probabilities of all circuit
  inputs
• Outputs Signal probabilities of all circuit
  nodes
• Step 1 Assign a variable for each input and
  logic gate
• Step 2 Going from inputs to outputs, compute
  symbolic probability of each gate output
• Step 3 Suppress all exponents in symbolic
  expressions
• Premise Reconvergent fanouts make signals
  correlated, and higher-order powers of
  probabilities cannot be present in symbolic
  expressions when primary inputs are independent

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Example

• y x1 x2 x1 x3
• z x1 x2 y
• P (y) P (x1 x2) P (x1 x3) P (x1 x2) P (x1
  x3)
• P (x1) P (x2) P (x1) P (x3) P
  (x1) P (x2) P (x3)
• P (z) P (x1 x2 ) P (y) P (x1 x2 ) P (y)
• P (x1) P (x2) P (x1) P (x2) P
  (x1) P (x3)
• - P (x1) P (x2) P (x3) - P (x1) P
  (x2) (P (x1) P (x2)
• P (x1) P (x3) - P
  (x1) P (x2) P (x3) )
• P (x1)

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Binary Decision Diagram to Calculate Signal
Probability

• Shannons Expansion Theorem
• f xi f (x1, , xi-1, 1, xi1, , xn) xi
  f (x1, , xi-1, 0,
• 
  xi1, , xn)
• Represents f in terms of its co-factors
• Traverse Binary Decision Diagram (BDD) from root
  in depth-first traversal, with post-order
  evaluation of P () at every node, to determine
• P (f) P (x1) P (fx1) P (x1) P (fx1)

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Example BDD
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Estimating Signal Activity

• Probabilistic techniques
• Boolean Difference (Sellers)
• Symbolic Boolean method to calculate signal
  activity
• Requires an Extended State Transition Graph
  (ESTG) to calculate activities for sequential
  circuits
• Use Chapmann-Kolmolgorov Equations
• Markov Probabilistic Process Model
• Need to use an approximate solution method
  exact method is too slow
• Approximate method is exact for tree-structured
  pipelined circuits
• Only gives lower-bound on activity, because the
  method ignores glitching power
• Due to use of zero-delay logic simulation model
• Inactive circuit parts still contribute
  inordinately to power estimate
• Due to assumption that even turned-off inputs
  have 0.5 prob.

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Methods for Estimation of Signal Activity
(continued)

• Statistical techniques
• Repeatedly simulate circuit with logic simulator,
  noting switching activities at various nodes
• Randomly-generated inputs
• Statistical mean estimation techniques with Monte
  Carlo simulation
• Glitching Power estimation
• Monte Carlo methods with probabilistic delay
  models
• Power Sensitivity
• Estimating minimum and maximum average power
• Power estimation with input vector compaction

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Methods for Estimation of Circuit Power

• Domino CMOS circuit considerations
• Circuit reliability issues
• Circuit-level power estimation
• High-level power estimation
• Power estimation using information theory
• Maximum power estimation
• Using automatic test-pattern generators
• Using steepest-descent gradient descent
• Using genetic algorithms

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Propagating Combinational Signal Activities
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Simultaneous Switching Problems
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Representing Sequential Circuits
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Typical State Transition Graph
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Extended State Transition Graph

• Represent each state with 2 present state bits
  and one present input bit to facilitate correct
  prob. calculation

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Unrolling of Sequential Circuit k Times
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Correction for Temporal Correlation
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Why Is Correlation a Problem?

• IT and ns20 appear to be independent
• No common ancestor node in graph
• But, ns20 is topologically dependent on node I0
  (input)
• I0 and IT are temporally correlated
• Gives erroneous power estimate unless we correct
  for this
• Define I as a temporally reconvergent node,
  rather than a topologically reconvergent node

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Summary of Power Estimation

• Probabilistic techniques Not useful
• Only give lower-bound on activity, ignore
  glitching power
• Inactive circuit parts contribute inordinately to
  power estimate
• Major Problem unable to estimate glitching
  power
• Probability theory needs to be augmented with
  Monte-Carlo analysis for power estimation