Front End Electronics testing: status

1
Front End Electronics testing status
Meeting held November 23/24 at University of
Bergen development of test hardware PASA
tester TU Darmstadt Uwe Bonnes ALTRO
tester Lund Lennart Osterman FEC
tester Frankfurt Gustav Rueschmann
(single card tester burnin tester) plans
for actual mass testing activities PASA Frank
furt backup CERN lt-NEW ALTRO Lund FEC
Frankfurt (single card burnin test) RCU ?
Bergen/Lund/CERN ?
2
Schematic overview of the 3 types of test setup
It is presently foreseen to use if at all
possible the same PCI interface in all 3 test
setups the first prototype of the RCU
3
PASA tester
4
FEC single board tester
Schematic setup
5
ALTRO tester
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ALTRO tester (detail)
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FEC burnin tester (schematics)
Schematic setup
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FEC burnin tester (mechanics)
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FEC tester (detail)
test of chip with 3 buffer amplifiers externally
switchable to switch on/off all 128 inputs
individually works well
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Potential problem areas
Hardware development seems to be in good
shape software PASA tester ALTRO
tester FEC card tester FEC burnin tester
demo/debug software by developer o.k. but
test/analysis software? -gt students? RCU
prototype needed in time to start testing of test
equipment
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Time estimate PASA chip testing
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Time estimate FEC testing
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Scenario for PASA test _at_IKF
For the actual mass testing we are planning to
use external labour students paid on hourly
base staff foreseen to fill gaps and maintain the
test stands since it is not clear how well this
is going to work we would like to foresee the
help of CERN as backup operation of 1 test stand
if necessary (The use of industry is still an
option. We are going to investigate whether we
can find companies in the vicinity of
Darmstadt/Frankfurt.)