Title: ESD Best Practices
12/27/23, 1157 AM
A Complete Guide on ESD Best Practices
(Electrostatic Discharge)
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- Home(h ps//oxeltech.de/en/) Reliability (h
ps//oxeltech.de/en/category/reliability/) ESD
Best Practices(h ps//oxeltech.de/en/esd-best-prac
ticesO/) xeltech - ETSabDle oBf CeosnttePnt ractices
- What is ESD?
- What harm does an ESD Surge do?
- How to mitigate the e ects of an ESD Surge?
- Typical Parasitics in the Path of ESD Source, IC
and TVS - How should these parasitics be handled for ESD
Protection? - Reducing EMI Generated from the ESD Surge
- What Is ESD?
- ESD Stands for Electrostatic Discharge.
Electrostatic discharge occurs when electricity
ows through a conductive body when touched by
another charged body. - This usually happens when two charged bodies are
in physical contact. In the case of electronics,
this phenomenon occurs when the circuit is
shorted out at some place, or a capacitor
dielectric has broken down. - What Harm Does An ESD Surge Do?
- An ESD surge introduces a high current pulse I
ESD of a few nanoseconds into the circuit board
via connections. If not handled properly, this
surge can damage the ICs placed on the PCB
board.
22/27/23, 1157 AM A Complete Guide on ESD Best
Practices (Electrostatic Discharge) connection
schemes for TVS are shown in the gure below 1 (h
ps/ www.electronicdesign.com/technologies/analog/
article/21806480/save-your-ics-
from-dreaded-esd) Oxeltech
As evident from the gure, the TVS diodes can be
used in two con gurations, i.e. unidirectional
and bidirectional. The unidirectional variant is
used when its certain that the spike would be
prominent on one side, for instance, the current
start-up spike. Furthermore, the polarity of
logic is also considered, i.e. if the input data
swings to both voltage polarities. However, the
ESD spikes and surges tend to be unpredictable in
terms of polarity, as do the logic polarity of
data pins. Therefore, bidirectional variants are
usually used for ESD protection. For further
discussion, the functional device in part will
be referred to. Typically an ESD diode array is
connected between the ESD source, i.e. the IO
connectors, and the IC to be protected. This is
done to give the current an alternate and easy
path to ground. This is illustrated in the gure
below 2 (h ps/ www.ti.com/lit/an/slva680/slva680.
pdf? ts1616314462467ref_urlh
ps253A252F252Fwww.google.com252F)
As the voltage across TVS increases, the diode
enters the breakdown region. It allows the
current to go to the ground. After the
appropriate selection of TVS, the next step is to
lower the path impedance between the ESD source
and TVS ground.
32/27/23, 1157 AM A Complete Guide on ESD Best
Practices (Electrostatic Discharge) Typical
Parasitics In The Path Of ESD Source, IC And
TVS The paths joining the ESD source, The IC and
the TVS intrOoduxceeplartaesiticc ihnductances.
These parasitic inductances are illustrated in
the gure below
As shown in the diagram above, the paths between
the data port, diode and IC have been labelled
as separate inductances, and their description is
given here LPORT is the inductance between the
data port and the rest of the IC and diode
assembly LIC is the inductance connecting the IC
to the diode and the data port LESD is the
branch inductance for the diode LGND is the
inductance of the second end of the diode
providing a return path to ground How Should
These Parasitics Be Handled For ESD
Protection? The following point help in handling
the parasitics mentioned above for optimum ESD
solution The ratio between LPORT and LIC should
be decreased to direct the current to the TVS
instead of IC. Conversely, LIC can also be
increased to achieve the objective. We can place
the IC as far from the TVS as possible (centre of
the board). This will increase LIC as compared
to LPORT. Furthermore, we should place TVS as
close to the Connector as possible, which will
reduce LPORT. We can also introduce a series
resistor between the ESD source and the IC in
order to reduce the current ow into the IC.
However, care must be taken while using the bu er
resistor in case of high-speed lines so that
signal a enuation can be avoided. To ease the
owing current into the TVS and to the ground, it
is necessary to reduce the LESD and LGND. One
way of doing this would be to shorten these
respective traces.
42/27/23, 1157 AM A Complete Guide on ESD Best
Practices (Electrostatic Discharge) Reducing EMI
Generated From The ESD Surge Another issue with
strong current surges is that they generate
strong Electromagnetic Interference EMI that can
a ect the neighbouring signaOl paxthes. lTthies
iscehspecially relevant for the signals passing
from the area between the ESD source and TVS.
Such coupling can be seen here 2 (h ps/
oxelectronics.de/2.09h ps/www.ti.com/lit/an/slva
680/slva680.pdf? ts1616314462467ref_urlh
ps253A252F252Fwww.google.com252F)
Figure 3 EMI Coupling in TVS Connection
Path To avoid EMI from interfering with the
other signals, we should treat this speci c
region as a no-go area for other unprotected
signals. This is also true for via-connected
signals on the adjacent layers that pass through
this region. Another important thing to consider
in ESD-protected PCB design is the corners
between the ESD source and TVS. Corners emit EMI
radiations and tend to increase cross-talk on the
region. If the corners are necessary, try
creating ones with the highest radii 450 being
the highest). The following diagram illustrates
the amount of cross-talk between signals caused
by 90o, 45o and rounded corners 2 (h ps/
oxelectronics.de/2.09h ps/www.ti.com/lit/an/slva
680/slva680.pdf? ts1616314462467ref_urlh
ps253A252F252Fwww.google.com252F)
52/27/23, 1157 AM A Complete Guide on ESD Best
Practices (Electrostatic Discharge) To conclude,
we have looked at what ESD surges and spikes are
and ways to reduce parasitics so that we can e
ectively use protection solutions like TVS diode
arrays. Lastly, we learned about shaping traces
to reduce EMI interference and cross-talk between
signal paths. Oxeltech If you are dealing with
ESD-related problems in your product or any other
safety-related problem, or if you need
Consultancy on any Hardware design (h ps/
oxeltech.de/en/hardware-design-and-simulation/)
topic, feel free to Contact Us (h ps/
oxeltech.de/en/contact-us/) for our Consultancy.
You can check out our other Technical Blogs (h
ps/ oxeltech.de/en/blog/) on various topics or
visit our new website Oxeltech. de to learn
about our services and products. Team
Oxeltech December 6, 2022(h ps//oxeltech.de/en/20
22/12/06/) 716 am No (h ps//oxeltech.de/en/esd-b
est- Comments practices/respond)
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A Complete Guide on ESD Best Practices
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