ELT Modeling

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ELT Modeling

• Junheng Zhang
• Southern Methodist University

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Purpose

• In PLL design, we need more accurate data of
  aspect ratio W/L, output resistance Ro, and
  capacitance( gate capacitance, gate-to-source
  capacitance, and gate-to-drain capacitance).

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Objective

• New accurate modeling technique based on
  conformal mapping provides SPICE models for
  edgeless FETs with arbitrary gate geometries for
  analog radiation-hardness-by-design.

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Advantages

• 1.More accurate in Output Resistance, and
  Capacitance.( Output Resistance and Capacitance
  agree to within 10 of measured data on TSMC
  0.25um and 0.18um)1
• 2. Fast speed( A few minutes in a laptop)1

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Modeling Flow

• 1. Conformal mapping Annular gate was mapped to
  rectangle gate.
• 2. Extraction of Aspect ratio,
• 3. Extraction of Output resistance,
• 4. Extraction of Capacitance.

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Conformal Mapping

• Conformal mapping can be used for finding the W/L
  ratio of a FET with an arbitrary gate geometry.
  Mapping of a gate with an abnormal geometry to a
  rectangular geometry with width Wr and length Lr
  providing an average W/L ratio Wr/Lr.

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Conformal Mapping

• A Schwartz-Christoffel (SC) transformation can be
  introduced in the conformal mapping to help find
  a solution.
• We use SchwarzChristoffel Toolbox(v2.3).

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SchwarzChristoffel Toolbox
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SchwarzChristoffel Toolbox
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SchwarzChristoffel Toolbox
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Wr/Lr

• So, we can get the Wr/Lr. In this case,
  Wr/Lr3.4/2.3.

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Result Explanation

• Does this mathematical result match physical
  reality?
• Yes, although we only do a mathematical
  transformation. From 2, we know that Riemanns
  mapping theorem guarantees the existence of a
  univalent mapping of any device with a gate
  bonded by a simple closed curve to a rectangular
  device, which satisfy the following observation

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• Observation the functional form of the
  relationship between Vds, Vt, and Vgs is not
  affected by gate geometry. For an arbitrarily
  shaped device an equivalent rectangular-gate
  transistor exists and the device geometry only
  affects the equivalent W/L ratio2.
• This means that after S-C transformation, the
  rectangle gate has the same W/L as the former one.

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The modeling of ELT Gate
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The modeling of ELT Gate

• Here I have 2 assumptions
• 1. the handle region can not influence the whole
  all ELT too much.( From1 we know that the
  handle region is usually relatively small so has
  little influence on CAPACITANCE.)
• 2.the Wr/Lr(tot)Wr/Lr(1)Wr/Lr(2) Wr/Lr(n)

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The modeling of ELT Gate

• We define Cv2, d16, d18, L1.

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The modeling of ELT Gate

• We can see that the whole gate can be divided
  into 2 parts4 trapezoidal areas and 4
  rectangles.

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Modeling of Trapezoidal Area

• First, we draw trapezoidal area in Toolbox

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Modeling of Trapezoidal Area

• The result of transformation, we can see that
  Wr/Lr(tra)16.24.

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The modeling of ELT Gate

• The Wr/Lr(tot)4Wr/Lr(tra)4Wr/Lr(rec)
• 416.244168.97

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Comparison with other methods

• The Wr/Lr calculated by Middle-line
  approximation1 Wr/Lr(174v24)/173.66
• The Wr/Lr calculated by formula1
• Wr/Lr8a/ln(d/d-2aL)4K(1-a)/v(aa2a5)ln(
  1/a)3(d-d)/2L,
• Wr/Lr67.36175 (K 3.5, for Llt0.5µm)

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Comparison with other methods

• We can see that our method is similar with the
  result calculated by formula(1). The middle-line
  assumption is not accurate, especially in
  short-channel MOSFET.

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The result discussion

• the error may result from
• 1.current crowding the conformal mapping
  provides a solution for the fields and potentials
  assuming no charge is present. The potentials may
  change due to presence of current and affect the
  W/L ratio. When the source/drain is narrow, there
  is current crowding that will reduce the current
  injected into the channel.1

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The result discussion

• 2. Data read error I read data by eye without
  the software accurate output of data.

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Solution

• 1. Current limiting correction to eliminate the
  error of current crowding. Software accurate
  output of data is needed.
• 2. To eliminate the error of reading data, we
  also need the accurate output of data.

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To do list

• 1.Disscuss with the author of Toolbox
• 2.Try other conformation software.

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Reference

• 1.Corbin L.Champion and George S. La Rue Accurate
  SPICE Models for CMOS Analog Radiation-Hardness-by
  -Design
• 2.Patrice Grignoux and Randall L.Geiger Modeling
  of MOS Transistors with Nonrectangular-Gate
  Geometries